PCB Scribe Lane Reduction via Laser Cutting and Zigzag Plating
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Solution Overview
Problem
The increasing number of pins in external connecting terminals of compact semiconductor packages poses challenges in manufacturing, particularly in the ball grid array (BGA) semiconductor package, where the narrow scribe lane width and copper contamination during saw blade cutting lead to environmental issues and malfunctions.
Innovation Solution
The use of laser cutting instead of saw blade cutting to reduce the scribe lane width and implement a zigzag printed circuit pattern for plating, which connects bond fingers across the scribe lane, minimizing contamination and malfunctions, and allowing for a more compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If saw blade cutting is used to divide semiconductor package unit frames, then the cutting process is simple and fast, but the scribe lane width becomes too wide (270 μm) and copper contamination occurs causing shorts and malfunctions
Solution Approach 1:
The patent replaces the mechanical saw blade cutting system with a laser cutting system. The laser beam precisely ablates the PCB material along the scribe lane without mechanical contact, eliminating copper contamination from saw blade debris while achieving much narrower cut widths (30-60 μm) compared to mechanical cutting (270 μm).
Solution Approach 2:
The patent changes the cutting method from mechanical to optical/thermal, and optimizes the scribe lane width parameter to 30-60 μm. This parameter change allows the printed circuit pattern for plating to be positioned optimally and prevents short circuits while maintaining manufacturing efficiency.
2Manufacturing precision
If the scribe lane width is reduced to prevent copper contamination, then contamination and shorts are minimized, but the printed circuit pattern for plating becomes difficult to implement across the narrow lane
Solution Approach 1:
The patent designs the printed circuit pattern for plating to extend beyond the narrow scribe lane into the adjacent semiconductor package unit frames. This dimensional approach allows the plating pattern to bridge across the narrow 30-60 μm lane, maintaining electrical connectivity while accommodating the reduced width achieved through laser cutting.
Solution Approach 2:
The patent employs a zigzag configuration for the printed circuit pattern for plating across the scribe lane. This curved/zigzag path allows the trace to cross the narrow lane at multiple points and angles, ensuring reliable plating and electrical connection while adapting to the constrained space of the narrow scribe lane.
3Manufacturing precision
If laser cutting is used to reduce scribe lane width, then contamination is minimized and precision is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent extracts the cutting function from the mechanical domain and implements it in the optical/thermal domain using laser technology. This extraction eliminates the complexity associated with mechanical saw blades, tool changes, and contamination control, replacing it with a cleaner, more precise laser ablation process that is easier to automate and control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the scribe lane width from 270 μm to 30-60 μm, minimizes environmental contamination, and enhances manufacturing efficiency by preventing shorts during laser cutting, while allowing for a more compact and efficient semiconductor package design.
Implementation Method 1
a semiconductor package unit frame obtained by laser cutting a PCB
Implementation Method 2
a printed circuit pattern for plating directly connected to a plurality of bond fingers on the semiconductor package unit frames and disposed to cross the scribe lane between adjacent semiconductor package unit frames
Implementation Method 3
a plurality of solder balls attached on a solder ball pad on a bottom surface of the semiconductor package unit frame
Data Source
AI summary
A PCB (printed circuit board) for manufacturing a semiconductor package. The PCB includes a plurality of semiconductor package unit frames; a scribe lane dividing the plurality of semiconductor package unit frames; and a printed circuit pattern for plating directly connected to a plurality of bond fingers on the semiconductor package unit frames and disposed to cross the scribe lane between adjacent semiconductor package unit frames.