PCB Low CTE Strips for Thermal Warpage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Electronic devices experience warpage and stress due to thermal expansion mismatches between printed circuit boards (PCBs) and components during the manufacturing process, leading to structural deformations and reliability issues.
Innovation Solution
Incorporating low Coefficient of Thermal Expansion (CTE) strips into the core layer of PCBs, with varying lengths and orientations based on component locations, to reduce thermal-induced warpage and stress by minimizing CTE mismatch between the PCB and components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional PCB structures are used during manufacturing, then the PCB can be easily manufactured, but thermal expansion mismatches cause warpage and stress in the final assembly
Solution Approach 1:
The patent applies local quality by inserting low CTE strips at specific locations within the core layer of the PCB, particularly in regions where components are mounted. These strips are strategically positioned to provide localized thermal expansion control where it is most needed, rather than uniformly modifying the entire PCB structure. This allows the PCB to maintain its overall manufacturability while addressing warpage issues at critical locations.
Solution Approach 2:
The patent employs composite materials by combining traditional PCB materials (FR-4 core layer, copper cladding) with low CTE strips made from materials such as ceramic-filled polymers or glass-reinforced materials. This composite structure creates a hybrid PCB that leverages the electrical and structural properties of traditional materials while incorporating the thermal stability of low CTE materials to reduce warpage and improve assembly reliability.
2Shape
If low CTE strips are added to the core layer, then thermal-induced warpage is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The patent applies segmentation by dividing the core layer into regions with and without low CTE strips. The low CTE strips are inserted as discrete elements within the core layer, allowing manufacturers to selectively add thermal control only where needed. This segmented approach simplifies the manufacturing process compared to creating an entirely new composite core material, as the strips can be added using modified lamination or insertion processes that build upon existing PCB manufacturing capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces warpage and stress in PCBs, enhances solder joint reliability, and improves the assembly process by minimizing thermal expansion mismatch, thereby increasing the reliability and stability of electronic devices.
Implementation Method 1
differences in the component and PCB thermal expansions can lead to warpage in the final assembly
Data Source
AI summary
Systems, apparatuses, and methods related to a printed circuit board (PCB) with a plurality of layers are described. Embodiments of the present technology can include low coefficient of thermal expansion (CTE) strips, such as material with a CTE value of less than a threshold level, added into the core layer of the PCB. The added low CTE strips can lower the overall CTE mismatch between the PCB and the mounted components.