PCB Magnetic Core Array Inductor Structure for Smaller Embedded Inductors
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Solution Overview
Problem
Existing pattern-shaped inductors on printed circuit boards lack the efficiency of chip inductors due to lower capacitance per unit volume, larger volume, and higher resistance, making it difficult to implement low-capacity inductors effectively.
Innovation Solution
Implement a magnetic core array inductor (MCAI) structure using a printed circuit board with a magnetic layer, through-vias, insulating layers, and metal pillars to form inductors, allowing for reduced size and easier mounting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If pattern-shaped inductors are used on printed circuit boards, then implementation is simpler, but inductor capacity is lower and volume is larger
Solution Approach 1:
The patent embeds chip-shaped inductors directly into the printed circuit board structure by forming cavities within the PCB and placing the inductors inside these cavities. This nesting approach allows the inductor to be integrated within the board thickness rather than occupying additional surface area, effectively reducing the overall volume occupied by the inductor while maintaining ease of manufacture through standardized embedding processes
Solution Approach 2:
The patent transitions from surface-mounted pattern-shaped inductors to three-dimensional chip-shaped inductors embedded within the PCB volume. By utilizing the vertical dimension (embedding within board layers) rather than only surface placement, the design achieves higher capacitance per unit volume while keeping the footprint on the board surface minimal
2Ease of manufacture
If pattern-shaped inductors are used on printed circuit boards, then manufacturing is easier, but resistance is higher
Solution Approach 1:
The patent changes the geometric parameters of the inductor structure from two-dimensional pattern traces to three-dimensional chip configurations with optimized winding patterns. This parameter change increases the effective conductor cross-sectional area and reduces the current path length, thereby reducing resistance and energy loss while maintaining manufacturing feasibility through automated placement and soldering processes
3Use of energy by moving object
If low-capacity inductors are implemented, then power efficiency increases, but inductor size reduction is difficult
Solution Approach 1:
The patent applies local quality optimization by using magnetic core materials with high permeability in specific regions of the inductor structure. This allows the inductor to achieve low capacitance values through optimized magnetic path design and core material selection, enabling low-capacity implementation with correspondingly reduced size while maintaining high power efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MCAI structure reduces inductor size, facilitates easier arrangement and mounting, and enhances space efficiency while providing adjustable inductor capacity.
Implementation Method 1
a magnetic layer
Implementation Method 2
a plurality of through-vias respectively penetrating through the magnetic layer; a plurality of insulating films respectively disposed on wall surfaces of the plurality of through-holes; a plurality of metal pillars respectively disposed on the plurality of insulating films and disposed in at least portions of the plurality of through-holes
Data Source
AI summary
The present disclosure relates to a printed circuit board including: a magnetic layer; a plurality of through-vias respectively penetrating through the magnetic layer; a plurality of first pads disposed on upper surfaces of the plurality of through-vias, respectively; a plurality of second pads disposed on lower surfaces of the plurality of through-vias, respectively; a first insulating layer covering at least portions of the plurality of first pads; a second insulating layer covering at least portions of the plurality of second pads. At least a portion of a side surface of the magnetic layer is substantially coplanar with at least a portion of one or more of a side surface of the first insulating layer and a side surface of the second insulating layer.