PCB Packaging Module With Vertical Pin-Out for Shorter Chip Wiring
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Solution Overview
Problem
Existing packaging modules in electronic devices require through holes for pin-out, leading to lengthy wires and increased power distribution loss due to the need for positioning far from the chip, which also increases device size and manufacturing complexity.
Innovation Solution
A packaging module design where both surfaces of the PCB are covered by a molding layer, with conductive pins electrically connected and partially exposed, allowing for direct electrical interaction without through holes, enabling closer placement to the chip and reducing wire length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a through hole is reserved on the packaging side for pin-out, then electrical signal can be transmitted, but the packaging module must be positioned far from the chip resulting in lengthy wires
Solution Approach 1:
The patent transitions from lateral pin-out through holes in the packaging side to vertical pin-out through the molding layer above the chip. This dimensional change allows pins to extend upward from the chip surface, enabling direct electrical connection without requiring lengthy lateral wires across the PCB, thus resolving the contradiction between signal transmission and wire length.
2Ease of manufacture
If the packaging module is positioned far from the chip to accommodate through holes, then pin connection is enabled, but device size increases
Solution Approach 1:
The patent implements nesting by placing the packaging module directly above the chip, with the molding layer enveloping both the chip and the pins. This nested configuration allows the pins to be contained within the vertical space above the chip rather than extending laterally, enabling pin connection while minimizing device footprint.
3Reliability
If lengthy wires are used to connect packaging module and chip, then electrical interaction is achieved, but power distribution loss increases
Solution Approach 1:
The patent eliminates lengthy lateral wires by changing the connection geometry to vertical pins extending through the molding layer. This dimensional change creates direct, short electrical pathways from the chip through the pins to the packaging module, significantly reducing wire length and associated power distribution losses while maintaining reliable electrical interaction.
Data Source
AI summary
Embodiments of this application disclose a packaging module and an electronic device. Both a first surface and a second surface of a PCB in the packaging module are covered with a molding layer, a conductive pin is electrically connected to the PCB, the conductive pin is packaged inside the molding layer along a stacking direction of the PCB and the molding layer, and the conductive pin is partially exposed on an outer surface of the molding layer. When the packaging module performs electrical interaction with another element, the PCB outputs or inputs an electrical signal by using the conductive pin. In this way, there is no need to reserve a through hole on a packaging side of the packaging module, the packaging module may be arranged at a position close to a chip, and there are short wires between the packaging module and the chip.