Printed Board Noise Suppression via Isolated GND Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing printed boards, particularly those with single-layered or two-layered configurations, struggle to effectively suppress high-frequency noise radiation from ICs due to inadequate isolation of power supply and GND terminals, leading to unstable GND potentials and increased electromagnetic interference (EMI) noise levels, which complicates noise suppression and increases costs when upgrading to four-layered boards.
Innovation Solution
A printed board design that includes a first circuit with paired power supply and GND terminals isolated from a second circuit, utilizing ferrite beads or common-mode chokes to suppress high-frequency noise, and forming island-shaped patterns or parallel wiring lines to isolate noise within the internal core circuit, preventing propagation to I/O buffer circuits and the entire board.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If power supply and GND wiring lines are commonly formed in the IC, then device complexity is reduced, but high-frequency noise propagates to I/O buffer circuits and signal output terminals
Solution Approach 1:
The patent divides the power supply and GND wiring lines into separate isolated wiring lines for the internal core circuit part and I/O buffer part. This segmentation prevents high-frequency noise generated in the internal core circuit from propagating to the I/O buffer circuits through common power supply and GND paths, thereby reducing electromagnetic radiation while maintaining manageable device complexity.
Solution Approach 2:
The patent applies different wiring configurations to different parts of the IC: isolated wiring lines are used for the internal core circuit part to suppress noise, while common wiring lines can be used for the I/O buffer part where noise is less critical. This localized approach optimizes noise suppression where needed without unnecessarily increasing overall device complexity.
2Object-generated harmful factors
If isolated wiring lines are formed for internal core circuit part and I/O buffer part, then high-frequency noise propagation is suppressed, but device complexity increases
Solution Approach 1:
The patent segments the power supply and GND wiring lines into isolated wiring lines for the internal core circuit part and common wiring lines for the I/O buffer part. This segmentation effectively suppresses high-frequency noise propagation from the internal core circuit to the I/O buffer circuits while maintaining a wiring structure that is not excessively complex.
Solution Approach 2:
The patent applies isolated wiring lines specifically to the internal core circuit part where noise suppression is most critical, while allowing common wiring lines to be used for the I/O buffer part. This partial application of isolation measures achieves effective noise suppression without unnecessarily increasing device complexity across the entire IC.
3Ease of manufacture
If single-layered or two-layered printed board configuration is used, then manufacturing cost and complexity are reduced, but high-frequency noise radiation suppression performance is insufficient
Solution Approach 1:
The patent segments the GND wiring lines into multiple separate GND wiring lines on the printed board, each connected to different GND terminals of the IC. This segmentation creates multiple independent noise suppression paths that effectively reduce high-frequency noise radiation even on single-layered or two-layered printed boards with limited layer configurations, avoiding the need for expensive four-layered board upgrades.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively confines high-frequency noise within the internal core circuit, reducing radiation from the printed board, cable, and metal case, while allowing for a simpler and less costly structure that maintains noise suppression performance across various board types, including single-layered, two-layered, and four-layered configurations.
Implementation Method 1
a first suppressing unit adapted to suppress a high-frequency potential variation generated by an operation of the first circuit, the first suppressing unit being arranged in a route that guides a wiring line from the first GND terminal to the second GND terminal
Implementation Method 2
utilizing ferrite beads or common-mode chokes to suppress high-frequency noise
Data Source
AI summary
An IC which includes a first circuit and a plurality of first paired terminals each including a first power supply terminal and a first GND terminal which are connected to the first circuit, and a second circuit and a plurality of second paired terminals each including a second power supply terminal and a second GND terminal which are connected to the second circuit. The first and second paired terminals are isolated inside. A printed board with the IC mounted has an inductor which is provided in a route that guides a wiring line from the first GND terminal to the second GND terminal and the GND of the printed board. The printed board has a portion where each of the first GND terminals is arranged inside the terminal array of the IC. The inductor suppresses a high-frequency potential variation generated by the operation of the first circuit.


