Multilayer PCB via-hole orientation for warpage reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing multilayer printed wiring boards for semiconductor devices face issues with warpage and thermal expansion, leading to misconnections and cracks during solder reflow and temperature cycle tests, due to their material composition and structural design.
Innovation Solution
A multilayer printed wiring board design featuring a core layer made of fiber-reinforced plastics with via-holes in resin layers that oppose the direction of core layer via-holes, along with a manufacturing process that includes forming conductive films and resin layers with specific etching and plating techniques to enhance adhesion and stability, reducing warpage and thermal expansion issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a multilayer printed wiring board is manufactured with conventional material composition and structural design, then the board can be produced with standard manufacturing processes, but the board experiences warpage and thermal expansion leading to misconnections and cracks during solder reflow and temperature cycle tests
Solution Approach 1:
The patent applies composite materials by combining fiber-reinforced plastics (core layer) with resin layers having specifically controlled glass transition temperatures. The core layer uses fiber reinforcement to provide dimensional stability and reduce warpage, while the resin layers are formulated with different Tg values to manage thermal expansion characteristics during temperature cycling and solder reflow processes.
Solution Approach 2:
The patent changes material parameters by controlling the glass transition temperature of resin layers to be within specific ranges (first resin layer: 50-150°C, second resin layer: -50-50°C). This parameter control allows the board to exhibit different mechanical properties at different temperature stages, reducing thermal stress and preventing cracks during temperature cycle tests and solder reflow.
2Reliability
If the board structure is designed to reduce warpage and thermal expansion, then connection reliability improves, but the manufacturing process becomes more complex with specific etching and plating requirements
Solution Approach 1:
The patent applies local quality by forming via-holes with different orientations in different layers. The first via-holes penetrate the core layer in a first direction, while the second via-holes penetrate the resin layers in a second direction opposite to the first. This local variation in via-hole orientation optimizes adhesion and stress distribution at specific locations, improving connection reliability without requiring complete redesign of the entire manufacturing process.
3Reliability
If via-holes in resin layers are oriented opposite to via-holes in core layer, then adhesion and stiffness are enhanced reducing misconnections, but the manufacturing process requires precise control of via-hole formation
Solution Approach 1:
The patent applies inversion by orienting the second via-holes in the resin layers in the opposite direction to the first via-holes in the core layer. While the first via-holes extend in a first direction to provide primary electrical connection, the second via-holes extend in a second direction opposite to the first, creating interlocking adhesion patterns that enhance bonding strength and reduce misconnections through reverse stress distribution.
Data Source
AI summary
A multilayer printed wiring board includes one or more resin layers having via-holes and a core layer having via-holes. The via-holes formed in the one or more resin layers are open in the direction opposite to the direction in which the via-holes formed in the core layer are open. A method for manufacturing a multilayer printed wiring board includes a step of preparing a single- or double-sided copper-clad laminate; a step of forming lands by processing the copper-clad laminate; a step of forming a resin layer on the upper surface of the copper-clad laminate, forming openings for via-holes in the resin layer, and then forming the via-holes; and a step of forming openings for via-holes in the lower surface of the copper-clad laminate and then forming the via-holes.