Multilayer PCB Planar Land Via Array Impedance Control
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Solution Overview
Problem
Conventional electronic circuits with integrated circuits operating at wide frequency bands and high currents require multiple decoupling capacitors, but existing multilayer circuit boards struggle to maintain desired impedance characteristics across the entire frequency band due to increased resistance and current flow path length.
Innovation Solution
The electronic circuit features a multilayer circuit board with planar lands on power and ground layers, densely populated with via holes connecting integrated circuit and decoupling capacitor terminals, and lands are discontinuously disposed with gaps to facilitate return current flow, approximating original frequency characteristics of the decoupling capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple decoupling capacitors are used to cover wide frequency band, then frequency compensation capability is improved, but device complexity and resistance increase
Solution Approach 1:
The patent divides the grounding function into multiple segments by creating separate grounding areas for different decoupling capacitors. Each capacitor has its own dedicated via holes and grounding path, preventing current interference between capacitors while maintaining individual effectiveness across different frequency bands.
Solution Approach 2:
The patent transitions from planar wiring patterns to three-dimensional via hole structures for grounding connections. By using multiple via holes vertically distributed through the circuit board layers, the grounding path is extended into the vertical dimension, reducing inductance and improving high-frequency performance without increasing horizontal space requirements.
2Reliability
If wiring patterns are made thicker and land area is increased to reduce resistance, then electrical resistance is reduced, but current flow path length increases
Solution Approach 1:
The patent uses via holes to create vertical grounding paths through the circuit board, transitioning the current flow from purely horizontal wiring patterns to a combination of horizontal and vertical paths. This three-dimensional approach reduces the effective path length by utilizing the Z-axis dimension, thereby reducing resistance without requiring larger land areas.
Solution Approach 2:
The patent concentrates via holes and grounding resources at critical locations near the integrated circuit and decoupling capacitors. By placing multiple via holes in dense arrays at specific strategic points rather than uniformly distributing them, the grounding effectiveness is maximized at the most critical current flow paths while minimizing overall resistance.
3Reliability
If decoupling capacitor is disposed close to integrated circuit to shorten current flow path, then resistance is reduced, but adaptability to different pin configurations is limited
Solution Approach 1:
The patent segments the grounding system into multiple independent via hole groups and grounding areas that can be independently configured. This segmentation allows the grounding structure to be adapted to different integrated circuit pin configurations and decoupling capacitor locations while maintaining short current flow paths and low resistance for each individual connection.
Solution Approach 2:
The patent creates a universal grounding structure using arrays of via holes that can serve multiple functions: providing low-inductance grounding paths for different decoupling capacitors, accommodating various integrated circuit pin configurations, and maintaining effectiveness across wide frequency bands. This multi-functional design allows the same basic structure to adapt to different circuit configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively sets impedance characteristics to desired values across the entire operating frequency band, reducing resistance and ensuring stable operation of integrated circuits by optimizing the current flow path and frequency characteristics.
Implementation Method 1
a planar land is formed on one or both of a power layer and a ground layer of the multilayer circuit board. The land has densely disposed therein a plurality of via holes that connect a terminal of the integrated circuit and a corresponding terminal of the decoupling capacitor
Data Source
AI summary
In order to keep impedance characteristics to desired values across the entire operating frequency band, an electronic circuit of the present invention includes an integrated circuit, a decoupling capacitor, and a multilayer circuit board on which the integrated circuit and the decoupling capacitor are mounted. In the electronic circuit, a planar land is formed on one or both of a power layer and a ground layer of the multilayer circuit board, the land having densely disposed therein a plurality of via holes that connect a terminal of the integrated circuit and a corresponding terminal of the decoupling capacitor, and the land formed on the power layer or the ground layer is discontinuously disposed at a predetermined interval with a gap having a predetermined width provided therebetween.