PCB Power Module Layout With Nonconductive Dummy Chips

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing power electronics modules face challenges in varying power efficiently without complex adaptations like changing chip size or using dummy semiconductors, leading to insulation issues and manufacturing complexities.

Innovation Solution

A power electronics module with a preset printed circuit board dimension and a lead frame for three-dimensional routing, using dummy chips made of nonconductive materials to maintain insulation and accommodate varying semiconductor counts, with a coating for fastening lead frame parts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If chip size or number is changed to vary power, then power variation is achieved, but device complexity and manufacturing complexity increase

Engineering Contradiction:
Improvepower variationVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The printed circuit board is divided into multiple connecting regions on the uppermost layer, each capable of independently accepting a power semiconductor. This segmentation allows flexible configuration of power semiconductors to achieve different power levels without redesigning the entire module.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the material parameter of the dummy chips from conductive semiconductor material to electrically nonconductive material. This parameter change allows the dummy chips to serve dual purposes: maintaining mechanical and electrical insulation structure while enabling power variation by simply adding or removing chips, thereby reducing manufacturing complexity.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If dummy semiconductors are used for power variation, then power adjustment is possible, but insulation issues arise

Engineering Contradiction:
Improvepower adjustmentVSAvoidinsulation issues
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The invention fundamentally changes the electrical parameter of the dummy chips from conductive (semiconductor material) to nonconductive. This parameter change eliminates the insulation problems associated with traditional dummy semiconductors while maintaining their structural function for mechanical support and electrical insulation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The dummy chips replicate the mechanical and dimensional characteristics of real power semiconductors without copying their electrical conductivity. They serve as structural placeholders that maintain the electrical insulation and mechanical integrity of the module while allowing power variation.

Inventive Principle:
Principle #26Copying

3Adaptability or versatility

If lead frame is adapted for power variation, then power range is adjusted, but device complexity increases

Engineering Contradiction:
Improvepower rangeVSAvoidlead frame complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The lead frame is designed with a universal structure that can accommodate any number of power semiconductors from one to four. The load-source connection is formed from multiple subregions that can be selectively connected to different connecting regions on the printed circuit board, providing multi-functionality without requiring multiple specialized lead frame designs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The lead frame incorporates dynamic connectivity through its multiple subregions for the load-source connection. These subregions can be selectively activated or deactivated depending on the number of power semiconductors installed, allowing the lead frame to adapt its electrical configuration dynamically without physical modification.

Inventive Principle:
Principle #15Dynamics

4Power

If maximum number of power semiconductors is arranged, then maximum power is achieved, but flexibility for power variation is reduced

Engineering Contradiction:
Improvemaximum powerVSAvoidpower flexibility
Core Design Contradiction:
PowerVSAdaptability or versatility

Solution Approach 1:

The printed circuit board features multiple independent connecting regions that can be selectively populated with power semiconductors. This segmentation allows the system to achieve maximum power when all regions are filled while maintaining the flexibility to reduce power by leaving some regions empty or using dummy chips, without compromising the maximum power capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention provides for more connecting regions and potential power semiconductor positions than may be needed for maximum power operation. This excessive capacity allows flexible downscaling of power by simply not utilizing all available positions, while the full maximum power capability remains intact when all positions are activated.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12564074B2Power electronics module
Publication Date: 2026.02.24 ZF FRIEDRICHSHAFEN AG
  • US12564074B2 patent drawing

AI summary

A power electronics module, having a PCB having power semiconductors arranged on connecting regions of an uppermost layer of said PCB, wherein the PCB has a preset dimension to arrange a preset maximum number of power semiconductors thereon. A lead frame arranged above the power semiconductors provides three-dimensional power and control routing, and includes a drain-source connection to connect to a drain-source contact of the PCB, and a load-source connection opposite the drain-source connection via the power semiconductors that is formed from a plurality of subregions, each of which can be brought into electrical contact with the power semiconductors, and a gate- and kelvin-source terminal, which are arranged above the load-source connection and have been brought into electrical contact with the power semiconductors. At least one dummy chip consisting of an electrically nonconductive material is arranged on each of the connecting regions that are not populated by power semiconductors.