PCB Reference Plane Layout for High-Speed Crosstalk Suppression
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Solution Overview
Problem
Printed circuit boards (PCBs) face challenges with electromagnetic interference (EMI) due to high-speed signal transmission and increased device density, leading to noise and crosstalk issues, which are exacerbated by the long current return paths and split ground planes in conventional designs, increasing manufacturing costs with multi-layered solutions.
Innovation Solution
The design incorporates additional conductive layers on the outermost insulating layers of the PCB, which serve as reference planes to suppress crosstalk noise and EMI by being electrically connected to ground or power potentials, reducing the spacing between these layers to less than 1 mm to effectively mitigate noise and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional conductive layers are added to suppress crosstalk and EMI, then signal quality improves, but device complexity increases
Solution Approach 1:
The patent applies dimensionality change by adding conductive layers in the vertical dimension (Z-axis) rather than increasing horizontal trace spacing. Specifically, a first conductive layer is placed on the outermost insulating layer and a second conductive layer is placed on the opposite outermost insulating layer, creating a three-dimensional shielding structure that suppresses crosstalk and EMI without increasing planar complexity
Solution Approach 2:
The patent uses insulating layers as intermediary materials between signal traces and external environment, and between the two conductive shielding layers. These insulating layers with controlled dielectric properties mediate the electromagnetic field interactions, allowing the conductive layers to suppress interference while maintaining signal integrity through the insulated pathways
2Object-affected harmful factors
If multi-layered PCB is used to separate power, signal and ground planes, then EMI is reduced, but manufacturing cost increases
Solution Approach 1:
The patent segments the EMI shielding function from the structural PCB layers by placing conductive layers on outermost insulating layers rather than integrating them into the core PCB stack-up. This segmentation allows the shielding functionality to be added to existing two-layer or four-layer PCB designs without requiring complex multi-layer construction, thereby reducing manufacturing cost while maintaining EMI reduction benefits
Solution Approach 2:
The conductive layers placed on outermost insulating layers serve multiple functions simultaneously: they act as EMI shields, provide additional signal routing capability, and can serve as reference planes. This multi-functionality reduces the need for separate dedicated shielding layers or additional PCB layers, thereby lowering manufacturing cost while achieving EMI reduction
3Productivity
If device density is increased to improve packaging, then productivity improves, but crosstalk increases
Solution Approach 1:
The patent creates a symmetric copying structure by placing identical conductive layers on both outermost insulating layers of the PCB. This symmetric copying approach provides balanced EMI shielding for signals traveling in opposite directions and maintains consistent electromagnetic field distribution, enabling higher device density without proportionally increasing crosstalk
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces crosstalk noise and EMI, improving signal quality and propagation speed while maintaining a lower fabrication cost compared to multi-layered PCBs, as demonstrated by simulation diagrams showing reduced near-end crosstalk and return loss, and enhancing eye-open margins in high-speed data transmission.
Implementation Method 1
a second conductive layer is disposed on the outermost insulating layer and substantially covering at least a portion of the first signal net. The second conductive layer is filled into the opening to electrically connect to the second signal net which is able to provide one of a ground potential and a power potential
Data Source
AI summary
A printed circuit board includes a reference plane embedded in a substrate and adjacent to the top surface of the substrate. The printed circuit board also includes a first signal net and a second signal net being in close proximity to each other and disposed within a specific region on the top surface of the substrate. An outermost insulating layer on the top surface of the substrate covers the substrate, the first signal net and the second signal net, and includes an opening to expose a portion of the second signal net. A conductive layer is disposed in the opening and on the outermost insulating layer corresponding to the specific region, such that the conductive layer overlaps with the first signal net. A fifth signal net is embedded in the substrate and between the reference plane and the outermost insulating layer.