PCB Short Structures for Accurate Backdrill Validation
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Solution Overview
Problem
The existing methods for backdrilling in printed circuit board (PCB) post-processing face challenges such as signal degradation due to vias and the complexity of ensuring proper counterbore depth, which can lead to DRC errors and increased manufacturing costs.
Innovation Solution
The method involves embedding short structures in supplementary data associated with PCB layers, distinct from the actual artwork, to facilitate backdrilling. This approach allows for the use of through-hole vias in the design, enabling the utilization of backdrill utility functionality while avoiding DRC errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional backdrilling methods are used to remove via stubs, then signal degradation is reduced, but the process complexity and manufacturing cost increase due to the need for precise counterbore depth control and additional tooling changes
Solution Approach 1:
The patent applies preliminary action by embedding short structures (test traces) into the PCB layer during the initial fabrication process. These short structures are pre-positioned at specific locations and depths within the PCB layers, allowing them to serve as built-in depth indicators for subsequent backdrilling operations. This preliminary embedding eliminates the need for complex real-time depth monitoring and tooling changes during backdrilling, as the short structures are already in place to guide the drilling depth automatically.
Solution Approach 2:
The short structures serve a dual function: they are both part of the functional circuitry and serve as self-contained depth indicators for backdrilling validation. When the backdrill process reaches the correct depth, it automatically intersects with these pre-positioned short structures, providing inherent feedback without requiring external monitoring systems or additional tooling. The short structures essentially validate the backdrill depth themselves, eliminating the need for separate verification mechanisms.
2Reliability
If short structures are embedded in supplementary data distinct from artwork, then DRC errors are avoided, but the data management complexity increases
Solution Approach 1:
The patent segments the PCB design data into distinct components: the functional artwork (circuit traces, pads, etc.) and the supplementary short structure data. By separating these elements into different data structures, the system allows DRC tools to process only the functional artwork without being confused by the test short structures. The short structures reside in a separate supplementary data layer that can be independently managed, processed, and validated, preventing DRC errors while maintaining clear data organization.
Solution Approach 2:
The supplementary data structure acts as an intermediary layer between the functional artwork and the backdrilling process. Instead of directly modifying the artwork to include short structures (which would cause DRC conflicts), the patent uses supplementary data as a mediator to convey the short structure information to the fabrication and backdrilling processes. This intermediary data structure allows the short structures to be communicated to manufacturers without interfering with the functional circuit design validation.
3Ease of manufacture
If through-hole vias are used in the design, then backdrill utility functionality can be utilized, but signal degradation occurs due to via stubs
Solution Approach 1:
The patent converts the harmful via stubs into beneficial depth indicators. Instead of viewing the via stubs merely as sources of signal degradation to be eliminated, the invention utilizes the physical presence and depth of these stubs as positive indicators for backdrilling. The short structures are deliberately positioned at depths that correspond to the via stub locations, transforming the problematic stub regions into useful reference points that guide the backdrill process to the correct depth, thereby eliminating the harmful stubs while leveraging their positional information.
Data Source
AI summary
Aspects of the subject disclosure may include, for example, receiving a command to embed, in supplementary data, information regarding one or more trace elements for one or more locations in a layer for a printed circuit board (PCB), and generating output data for facilitating fabrication and post-processing of the PCB, wherein the output data includes the supplementary data, and wherein the supplementary data enables the one or more trace elements to be formed in the layer during the fabrication of the PCB and leveraged during the post-processing of the PCB. Other embodiments are disclosed.