PCB Side-Mounted Component Structure Using Exposed Via Plating
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Solution Overview
Problem
Conventional electronic component mounting on printed circuit boards is limited by the small surface area, leading to constraints on component size and position, and generates electromagnetic interference due to parallel conductive patterns, especially when multiple boards are laminated.
Innovation Solution
The solution involves creating a structure with conductive pattern layers on a printed circuit board, where vias are formed to connect these layers, and the inner walls are plated with a conductive layer, allowing for the exposure of cut faces as land patterns on the side of the board for mounting components, which are then solder-connected, and using conductive fillers to expand the connection area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If electronic components are mounted on the surface of the printed circuit board, then the mounting process is simple, but the mounting surface area is limited
Solution Approach 1:
The patent extends the mounting surface from the traditional planar board surface to the side surface of the board by creating exposed copper foil areas on the lateral edges. This dimensional extension allows components to be mounted on previously unused board surfaces, effectively increasing the total mounting area without adding board layers or complexity.
Solution Approach 2:
The board edge is segmented into multiple exposed copper foil regions, each serving as an independent mounting area. These segmented exposure areas can be distributed around the board perimeter, allowing components to be mounted at various locations along the side surface, thereby maximizing the utilization of available edge space.
2Quantity of substance
If the number of electronic components is increased, then the functional capability is improved, but the printed circuit board size must be enlarged
Solution Approach 1:
By utilizing the vertical side surfaces of the board in addition to the top and bottom surfaces, the patent creates a three-dimensional mounting configuration. This allows components to be placed on the board edges, effectively adding another dimension for component placement without increasing the board's footprint area.
3Productivity
If multiple printed circuit boards are laminated with parallel conductive patterns, then the connection density is improved, but electromagnetic interference is generated
Solution Approach 1:
The patent extracts the harmful parallel conductive pattern configuration by removing the continuous copper layers from the board edges and replacing them with segmented exposed copper foil areas. This discontinuous, segmented structure interrupts the parallel current paths that generate electromagnetic interference, while still providing sufficient connection points for high-density inter-board connections.
4Area of stationary object
If the exposed portion of internal copper foil is used for mounting, then the mounting surface area is enlarged, but the exposed portion is miniature making solder connection difficult
Solution Approach 1:
The patent applies local quality enhancement by selectively exposing copper foil in specific regions along the board edge while maintaining the original board structure. The exposed copper areas are designed with optimal dimensions and distributions that provide sufficient soldering surface area, making them easier to connect than the miniature exposed portions in conventional approaches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for higher component density without size constraints, reduces electromagnetic interference by orthogonal connection of boards, and facilitates straightforward solder mounting with increased current flow capacity.
Implementation Method 1
a conductive plating layer covering an inner wall face of the via hole is electrically connected to the conductive pattern layer contacting the via hole
Implementation Method 2
The printed circuit board includes a conductive filler formed of a conductive paste with which the via hole is filled
Implementation Method 3
the electronic component being surface-mounted on the end face of the printed circuit board by using the cut face of the conductive plating layer as a land pattern which is solder-connected to the mount connecting portion
Data Source
AI summary
Provided is an electronic component mounting structure and method for mounting electronic components on the side of a printed circuit board by means of simple fabrication and enlarging the surface area for mounting electronic components. A cut face of a conductive plating layer, which is obtained by cutting along a via in which a conductive plating layer covering an inner wall face of a via hole is electrically connected to a conductive pattern layer of the printed circuit board, is exposed at a cut end face and used as a land pattern which is solder-connected to a mount connecting portion of the electronic component. The end face at which the land pattern is exposed is a surface parallel to the side of the printed circuit board, and therefore electronic components can be mounted on the end face parallel to the side.