PCB-Mounted Snubber Circuit Layout for Semiconductor Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor devices with snubber circuits face reliability issues due to heat generation in power semiconductor elements and decreased snubbing effects caused by wire elongation.

Innovation Solution

A semiconductor device configuration featuring a snubber circuit mounted on a printed circuit board, connected between external and relay terminals, which includes resistive and capacitive elements to mitigate surge voltage and ringing, while being thermally managed by carbon layers to prevent heat transmission and maintain reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a snubber circuit is connected parallel to the power semiconductor element, then surge voltage and ringing are suppressed, but heat generation occurs in the power semiconductor element and reliability decreases

Engineering Contradiction:
Improvesurge voltageVSAvoiddevice reliability
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent introduces a dedicated snubber circuit board as an intermediary component that hosts the snubber circuit (capacitor and resistor) separate from the power semiconductor element. This intermediary structure allows the snubber circuit to absorb surge voltage and damping energy without transmitting heat to the power semiconductor element, thus suppressing ringing while maintaining reliability. The snubber circuit board acts as a thermal and electrical buffer between the power semiconductor element and the snubber components.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If wire length is increased to connect snubber circuit, then ease of assembly is improved, but parasitic inductance increases and snubbing effect decreases

Engineering Contradiction:
Improveassembly easeVSAvoidsnubbing effect
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent merges the snubber circuit components (capacitor and resistor) onto a single snubber circuit board that is integrated with the substrate. This consolidation reduces the number of separate wire connections needed, as the components are electrically connected through the board's internal wiring rather than external wires. The merging of components onto one board minimizes parasitic inductance while maintaining assembly ease through standardized mounting procedures.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The snubber circuit board serves as an intermediary structure that provides electrical connections between the power semiconductor element and the snubber components through controlled impedance traces rather than external wires. This intermediary wiring system reduces parasitic inductance compared to long external wire connections, while still allowing for ease of assembly through standardized board-level integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Temperature

If snubber circuit components are mounted on separate substrates, then heat isolation is improved, but device complexity increases

Engineering Contradiction:
Improveheat isolationVSAvoidstructural complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent combines the capacitor and resistor components of the snubber circuit onto a single snubber circuit board that is mounted on the substrate. This merging approach provides heat isolation from the power semiconductor element while avoiding the increased complexity that would result from mounting components on multiple separate substrates. The unified board structure simplifies the overall device architecture while maintaining thermal management benefits.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces surge voltage and turn-off losses, improves reliability by minimizing thermal stress and parasitic inductance, and suppresses switching losses, enhancing the overall performance of the semiconductor device.

Implementation Method 1

a capacitive element (82a, 82b, 82c, 82d) and a resistive element (83a, 83b, 83c, 83d) arranged on the top surface side of the printed circuit board (6)

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a resistive element (83a, 83b, 83c, 83d) arranged on the top surface side of the printed circuit board (6)

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Implementation Method 3

carbon layers to prevent heat transmission and maintain reliability

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20230411313A1Semiconductor device
Publication Date: 2023.12.21 FUJI ELECTRIC CO LTD
  • US20230411313A1 patent drawing
  • US20230411313A1 patent drawing
  • US20230411313A1 patent drawing

AI summary

A semiconductor device includes: an insulated circuit substrate; a semiconductor chip provided on the insulated circuit substrate; a first external connection terminal provided on the insulated circuit substrate; a relay terminal provided on the insulated circuit substrate; a printed circuit board arranged over the semiconductor chip and connected to the first external connection terminal and the relay terminal; and a first snubber circuit provided on the printed circuit board and having one end connected to the first external connection terminal via the printed circuit board and another end connected to the relay terminal via the printed circuit board.