PCB Source Pad Segmentation for Faster Discrete Transistor Switching
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Solution Overview
Problem
The switching speed of transistors in power converters is limited by parasitic inductances in conductive connection elements, leading to reduced switching frequencies and increased losses in passive components.
Innovation Solution
The configuration of the printed circuit board is modified to include disjoint source connection pads, allowing for the reduction of parasitic source connection inductance, enabling higher switching speeds without increasing the risk of malfunctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional connection methods are used, then manufacturing is simple, but parasitic inductance is high which limits switching speed
Solution Approach 1:
The source connection is segmented into two separate pads (first source connection pad and second source connection pad) instead of using a single conventional pad. This segmentation allows the control circuit to connect to the source through one pad while the power circuit connects through the other pad, thereby reducing parasitic inductance in the control signal path and improving transistor switching speed.
2Speed
If connection distance is reduced, then parasitic inductance decreases and switching speed increases, but manufacturing precision requirements increase
Solution Approach 1:
The invention utilizes the planar dimension of the printed circuit board by placing the two source connection pads at different locations on the board surface. This spatial distribution in two dimensions allows optimization of connection paths for both control and power circuits without requiring extreme precision in vertical alignment, thus reducing parasitic inductance while maintaining manufacturability.
Data Source
Figure 1A~1C
Figure 2A~2C
Figure 3A~3C
AI summary
The invention relates to an electronic device comprising: a discrete transistor having a semiconductor chip encapsulated in a housing made of an insulating material leaving accessible a first connection pad to a first conduction terminal of the transistor; and a printed circuit board (320) having first (125) and second (129) disjoint connection pads, in which the transistor is mounted on the printed circuit board so that the first connection pad (105) of the transistor is in contact with the first (125) and second (129) connection pads of the printed circuit board.