Asymmetric PCB Layer Stackup for Thin-Board Warpage Control
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Solution Overview
Problem
Circuit boards experience warpage during manufacturing due to differences in thermal expansion coefficients and modulus of elasticity between insulating and metal layers, leading to reliability issues and hindering automated processes.
Innovation Solution
A circuit board design with asymmetric substrate layers, where the outermost circuit pattern layers have increased thickness compared to inner layers, and the protective layers have varying thicknesses to minimize warpage, maintaining flatness and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the circuit board is made thinner to meet product miniaturization requirements, then the size and weight are reduced, but warpage defects increase significantly
Solution Approach 1:
The patent applies asymmetry by making the outermost circuit pattern layers thicker than the inner circuit pattern layers. This asymmetric thickness distribution compensates for the differential thermal expansion between metal and insulating materials, reducing warpage in thin circuit boards without increasing overall board thickness.
Solution Approach 2:
The patent changes the thickness parameter of specific circuit pattern layers (outermost layers thicker than inner layers) to control and minimize warpage. This parameter optimization allows thin circuit boards to maintain flatness during manufacturing and operation.
2Productivity
If automated strip test and assembly processes are implemented, then productivity is improved, but warpage causes automation failure
Solution Approach 1:
The asymmetric thickness design of outermost circuit pattern layers ensures flatness of the circuit board, enabling successful implementation of automated strip test and assembly processes by eliminating warpage-related automation failures.
3Ease of manufacture
If uniform thickness is used for all circuit pattern layers, then manufacturing is simplified, but warpage occurs due to material property differences
Solution Approach 1:
The patent applies local quality by giving different thicknesses to different circuit pattern layers - specifically, the outermost layers are made thicker than the inner layers. This localized thickness variation addresses the differential thermal expansion at critical surfaces while maintaining uniformity in inner layers.
Solution Approach 2:
The asymmetric thickness distribution (thicker outermost layers) compensates for the symmetric but problematic uniform thickness design, reducing warpage caused by material property differences between metal and insulating layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces warpage, ensuring accurate positioning of circuit patterns and via holes, enhancing manufacturing efficiency and reliability by maintaining flatness during the manufacturing process.
Implementation Method 1
The causes of warpage are various, such as the difference in the coefficient of thermal expansion (CTE) and the difference in the modulus of elasticity between the insulating material and the metal circuit.
Implementation Method 2
The causes of warpage are various, such as the difference in the coefficient of thermal expansion (CTE) and the difference in the modulus of elasticity between the insulating material and the metal circuit.
Data Source
AI summary
A circuit board according to an embodiment includes a first substrate layer; a second substrate layer disposed on the first substrate layer; and a third substrate layer disposed under the first substrate layer; wherein the second substrate layer includes: a first inner circuit pattern layer disposed on the first substrate layer; and a first outermost circuit pattern layer disposed on the first inner circuit pattern layer; wherein the third substrate layer includes: a second inner circuit pattern layer disposed under the first substrate layer; and a second outermost circuit pattern layer disposed under the second inner circuit pattern layer; wherein a thickness of the first outermost circuit pattern layer is greater than a thickness of each of the first inner circuit pattern layer and the second inner circuit pattern layer.