PCB Tapered Via Structure for Fine-Pitch Bump Reliability
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Solution Overview
Problem
The increasing demand for higher density and improved connection reliability in multichip packages, particularly in server products with numerous CPU and GPU cores, requires the development of substrate and package structures that can accommodate finer chip bump pitches without compromising yield.
Innovation Solution
A printed circuit board design featuring a first insulating layer with a tapered via layer connecting a first metal layer on top and a second metal layer below, where the via layer narrows towards the top and the metal layers have curved surfaces, allowing for fine pitch bumps without etching the insulating layer, thereby enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing methods are used with cylindrical vias and flat metal layers, then the manufacturing process is simple, but fine pitch bumps cannot be implemented and eccentricity issues occur between pads and vias
Solution Approach 1:
The via layer is designed with a tapered shape having curved side surfaces instead of cylindrical straight sides. This curvature allows the via opening to be larger at the bottom than at the top, enabling fine pitch bump implementation while maintaining manufacturing feasibility. The curved geometry resolves the contradiction by providing precise alignment without requiring complex etching processes.
Solution Approach 2:
The metal layers are designed with curved top and bottom surfaces instead of flat surfaces, and the via layer thickness varies along its height. These parameter changes in geometry allow the metal layers to conform to the tapered via structure, eliminating eccentricity between pads and vias while enabling fine pitch bumps without compromising manufacturing simplicity.
2Manufacturing precision
If the insulating layer is etched to create protruding bumps, then fine pitch bumps can be achieved, but the manufacturing process becomes complex and reliability decreases
Solution Approach 1:
Instead of etching the insulating layer to create protruding bumps, the patent uses curved metal layers conforming to a tapered via structure. This approach achieves fine pitch bumps while maintaining the integrity of the insulating layer, thereby preserving connection reliability. The curved geometry provides the necessary precision without the harmful effects of insulating layer etching.
3Ease of manufacture
If cylindrical vias with flat metal layers are used, then the structure is simple, but eccentricity occurs between pads and vias reducing yield
Solution Approach 1:
The tapered via layer with curved side surfaces and curved metal layer surfaces eliminate eccentricity between pads and vias. The curved geometry naturally aligns the pad center with the via center, improving yield while maintaining ease of manufacture through a single integrated structure formation process.
Data Source
AI summary
A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes a first insulating layer, a first metal layer disposed on an upper side of the first insulating layer, a second metal layer disposed on a lower side of the first insulating layer, and a first via layer penetrating through at least a portion of the first insulating layer to connect the first metal layer to the second metal layer. The first via layer has a tapered shape becoming narrower toward a top of the first insulating layer, and an upper surface of the first metal layer is substantially flat, and a side surface of the first metal layer has a curved surface.