PCB Design With Thermal Zones and 3D Clearance Checks
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Solution Overview
Problem
Existing PCB design software fails to determine minimum clearances between conductive elements in different layers of multi-layer PCBs and maximum component temperatures under fault conditions, leading to time-consuming iterations and potential errors in designing intrinsically safe devices for hazardous environments.
Innovation Solution
A computer-implemented method for designing PCBs that determines thermal zones, clearances, and temperature limits using thermal data and clearance rulesets, ensuring conductive elements in different layers are isolated and temperature violations are avoided, compliant with intrinsic safety standards like IEC 60079.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing PCB design software is used to determine minimum clearances in single conductive layer, then clearance determination is available, but clearance determination for multi-layer PCB is not possible
Solution Approach 1:
The patent extends the clearance determination software to handle multiple conductive layers simultaneously. The system now universally applies clearance rules across all layers (first conductive layer, second conductive layer, and intermediate layers) rather than being limited to single-layer designs, enabling comprehensive intrinsic safety verification for multi-layer PCBs.
Solution Approach 2:
The patent introduces a vertical dimension to clearance determination by calculating clearances between conductive elements in different layers. The system determines both in-plane clearances (within the same layer) and inter-layer clearances (between different layers), transforming the traditional two-dimensional clearance check into a three-dimensional verification that accounts for spatial separation across multiple conductive layers.
2Productivity
If existing PCB design software is used, then single-layer clearance determination is possible, but multi-layer clearance and temperature analysis is not possible
Solution Approach 1:
The patent performs preliminary verification of clearance and temperature conditions during the design process itself. The system automatically checks whether conductive elements in different layers maintain sufficient clearances and whether component temperatures remain below maximum allowable limits, eliminating the need for subsequent manual verification iterations and reducing overall design time.
Solution Approach 2:
The system provides real-time feedback on clearance compliance and temperature violations. When conductive elements are positioned or components are selected, the software immediately indicates whether the design meets intrinsic safety requirements or identifies specific violations, allowing designers to correct issues promptly without time-consuming manual checking and rechecking.
3Reliability
If manual iteration is used for clearance and temperature verification, then design flexibility is maintained, but design time increases and errors occur
Solution Approach 1:
The verification system performs self-checking of clearance and temperature conditions automatically. The software independently evaluates whether conductive elements maintain required clearances across all layers and whether component temperatures remain within limits, eliminating the need for manual verification and reducing human error while maintaining design flexibility.
4Reliability
If minimum clearance between conductive elements is increased for isolation, then safety is improved, but packing density decreases
Solution Approach 1:
The patent applies different clearance requirements to different spatial relationships between conductive elements. The system distinguishes between conductive elements in the same layer (requiring in-plane clearance) and conductive elements in different layers (requiring inter-layer clearance through dielectric materials). This localized application of clearance rules allows for optimized packing density while maintaining safety, as vertical separation through dielectric layers provides effective isolation without consuming additional planar area.
Data Source
AI summary
A computer-implemented method for designing a printed circuit board including one or more conductive layers is disclosed. The method includes determining one or more conductive elements of each conductive layer, and determining a plurality of thermal zones. Each conductive element is included in a corresponding thermal zone. The method further includes retrieving a clearance ruleset including minimum clearances for the plurality of conductive elements; selecting one conductive element and one other conductive element; determining a distance between the one conductive element and the one other conductive element in three-dimensional space; and recording a spacing violation if the distance between the one conductive element and the one other conductive element is less than the minimum clearance for the one conductive element and the one other conductive element. The method further includes performing thermal analysis of electronic components of each thermal zone and recording a thermal violation based on the thermal analysis.