PCB Thermal Path for Vertically Integrated IVR Chiplet Cooling

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Solution Overview

Problem

Existing PMICs face challenges with consistency among different power rails and stability within a single power rail, leading to performance variations or malfunctions in SoCs. Additionally, managing thermal dissipation in PMICs is inadequate, resulting in potential thermal buildup and affecting system performance, reliability, and efficiency.

Innovation Solution

A configurable PMIC with an array of micro-integrated voltage regulator cells that uses consolidated reference circuits to ensure consistent power delivery across power rails. This PMIC also incorporates a thermal path, including solid vias and heat exchangers, to effectively dissipate heat from vertically mounted chiplets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional PMIC designs are used with separate reference circuits for each power rail, then each power rail can be independently regulated, but consistency among different power rails deteriorates due to mismatched regulation circuitry and poor coordination

Engineering Contradiction:
Improveconsistency among power railsVSAvoidmultiple separate reference circuits
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent consolidates multiple separate reference circuits into a single shared reference circuit that serves all power rails. This merging approach ensures that all voltage regulator cells across different power rails are driven by the same reference, eliminating consistency issues caused by mismatched regulation circuitry while reducing the overall number of reference circuits in the system

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared reference circuit is designed to serve multiple power rails simultaneously, providing a universal reference voltage that enables consistent regulation across all power rails. This multi-functional approach allows a single reference circuit to replace what would traditionally require multiple separate reference circuits, improving coordination while reducing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Temperature

If traditional thermal management approaches are used focusing only on processors, then processor cooling is optimized, but PMIC thermal dissipation deteriorates due to inadequate heat dissipation pathways

Engineering Contradiction:
ImprovePMIC thermal dissipationVSAvoidthermal management structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent divides the thermal management system into separate pathways for different components. Specifically, it creates dedicated thermal dissipation pathways for the PMIC that are distinct from processor cooling approaches, allowing each component to be optimized independently while addressing the previously neglected PMIC thermal issues

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extends thermal management from the traditional two-dimensional processor cooling plane into the vertical dimension by implementing three-dimensional thermal pathways. This includes conducting layers extending through substrate thickness and thermal vias penetrating through multiple layers, creating volumetric heat dissipation pathways that were not present in traditional processor-focused thermal management

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If vertically integrated on-chip inductor based IVR chiplets are used, then power delivery efficiency is improved, but thermal buildup worsens due to concentrated heat generation in compact vertical structures

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoidthermal buildup
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent introduces intermediate thermal management structures between the vertically integrated IVR chiplets and the external environment. These intermediaries include conducting layers embedded in the substrate and thermal vias that act as heat transfer mediators, conducting heat away from the compact vertical power delivery structures without compromising their high-efficiency power delivery function

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional mechanical or convection-based cooling approaches with solid-state thermal conduction pathways. By using thermally conductive layers and vias integrated into the substrate, the system achieves heat dissipation through controlled thermal conduction rather than relying on mechanical cooling systems or natural convection, which would be inadequate for the high-power density vertical structures

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves consistent and reliable power delivery to SoC power rails, preventing performance variations and malfunctions. Additionally, the enhanced thermal dissipation improves system performance, reliability, and efficiency, especially in high-power applications.

Implementation Method 1

a thermal path between a first side and a second side of the PCB. The thermal path is configured to dissipate heat from the plurality of chiplets to ambient

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

dissipate heat from the plurality of chiplets to ambient

Methodology Applied
Scientific EffectConvection: Convection

Implementation Method 3

including solid via(s)... The thermal path is built on a printed circuit board (PCB) along with solid via(s)

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250132297A1Thermal Conducting Structure for Vertically Integrated On-Chip Inductor Based IVR Chiplets with SoC
Publication Date: 2025.04.24 POWERLATTICE TECHNOLOGIES INC
  • US20250132297A1 patent drawing
  • US20250132297A1 patent drawing
  • US20250132297A1 patent drawing

AI summary

This application is directed to providing a thermal path for a circuit package. The circuit package includes a plurality of chiplets. The circuit package further includes a substrate coupled to the plurality of chiplets. The circuit package further includes a processor coupled to the plurality of chiplets through the substrate. The circuit package further includes a printed circuit board coupled to the plurality of chiplets and including a thermal path between a first side and a second side of the printed circuit board. The thermal path is configured to dissipate heat from the plurality of chiplets to ambient.