PCB Through-Hole Layout for Void-Free Semiconductor Encapsulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor packaging technologies face challenges in efficiently sealing semiconductor devices while preventing void formation and ensuring reliable bonding, particularly in processes involving encapsulation materials.
Innovation Solution
A semiconductor device design incorporating a printed circuit board with internal and external through holes, where external through holes are spaced apart from the semiconductor devices, allowing encapsulation material to flow and discharge voids effectively, while internal through holes facilitate complete sealing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encapsulation material is applied to seal semiconductor devices, then sealing reliability is improved, but void formation occurs in the encapsulation material
Solution Approach 1:
The through holes are segmented into internal through holes (under semiconductor devices) and external through holes (outside semiconductor devices), creating a segmented void discharge path that allows systematic removal of voids from different regions of the encapsulation material
Solution Approach 2:
The through holes act as intermediary channels that facilitate the discharge of voids from the encapsulation material, providing a dedicated pathway for void removal without compromising the sealing function
2Reliability
If through holes are added to the printed circuit board, then void removal capability is improved, but device complexity increases
Solution Approach 1:
The through holes serve multiple functions: they act as structural elements of the printed circuit board, provide void discharge pathways, and enable encapsulation material flow, thereby reducing the need for separate dedicated void removal structures
Solution Approach 2:
The void discharge function is merged with the existing printed circuit board structure by integrating through holes into the board design, combining structural support and void removal capabilities in a single component
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances void removal and ensures reliable sealing of semiconductor devices, improving the integrity and reliability of the semiconductor package by preventing voids and ensuring consistent package shape during individualization.
Implementation Method 1
CUF is a process of spraying an underfill material beside a chip by using capillaries such that the underfill material fills between the chip and a substrate by surface tension
Data Source
AI summary
A semiconductor device includes: a semiconductor molding upper mold and a semiconductor molding lower mold, wherein a printed circuit board having a plurality of semiconductor devices mounted thereon is disposed on the semiconductor molding lower mold; and a cavity disposed between the semiconductor molding upper mold and the semiconductor molding lower mold, wherein the printed circuit board includes internal through holes and external through holes, wherein the external through holes are spaced apart from a position where the plurality of semiconductor devices are mounted, and the semiconductor molding lower mold has through holes that overlap the internal through holes and the external through holes.