PCB Through-Hole Structure for Coaxial Via Impedance Matching
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Solution Overview
Problem
Existing circuit boards experience impedance mismatch and electromagnetic interference (EMI) shielding gaps due to the design of coaxial via, which affects signal integrity and noise reduction, especially at high-frequency signals.
Innovation Solution
A circuit board design featuring a conductive through hole structure with conductive pillars and dielectric layers that electrically connect external circuit layers, forming a signal path surrounded by a ground path to enhance signal integrity and reduce noise interference, using a manufacturing method that involves lamination and patterning of metal and conductive layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If insulating layers are laminated to block conductive layers in coaxial via design, then electromagnetic interference shielding is achieved, but impedance mismatch occurs affecting signal integrity
Solution Approach 1:
The patent removes the insulating layer from the coaxial via structure, extracting the harmful element that caused impedance mismatch. By eliminating the insulating layer between conductive layers, the design achieves continuous impedance matching while maintaining EMI shielding through alternative means such as ground planes and via shielding structures.
Solution Approach 2:
Instead of using insulating layers to block conductive layers as in conventional design, the patent inverts the approach by directly connecting conductive layers through conductive vias without insulating barriers. The shielding function is achieved through surrounding ground planes and magnetic shielding materials rather than electrical insulation.
2Ease of manufacture
If conventional coaxial via design with insulating layers is used, then manufacturing process is simplified, but signal loop is not closed causing noise interference
Solution Approach 1:
The patent segments the signal path into multiple controlled impedance sections, each with specific characteristics. The signal travels through conductive vias in controlled impedance environments with dedicated ground references at each stage, creating closed loops that minimize noise while maintaining manufacturing feasibility through standardized layer configurations.
3Adaptability or versatility
If signal path and ground path are on different planes, then routing flexibility is improved, but noise interference cannot be reduced due to open signal loop
Solution Approach 1:
The patent utilizes the vertical dimension through multiple PCB layers to create closed signal loops. By stacking signal and ground paths in adjacent layers and using via connections, the design achieves three-dimensional loop closure that maintains routing flexibility on different planes while eliminating noise through complete magnetic flux containment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves signal integrity and reliability by forming a closed high-frequency and high-speed signal loop, reducing signal energy loss and noise interference, and addressing impedance mismatch issues compared to conventional build-up methods.
Implementation Method 1
The conductive material layer covers an inner wall of the through hole and electrically connects the first external circuit layer and the second external circuit layer to define a signal path
Implementation Method 2
The first external circuit layer, the conductive pillars, the second substrate, the conductive holes, and the second external circuit layer are electrically connected to define a ground path. The ground path surrounds the signal path.
Data Source
AI summary
A manufacturing method of the circuit board includes the following steps. A metal layer, a first substrate, a second substrate, and a third substrate are laminated. Multiple blind holes and a through hole are formed. A conductive material layer is formed, which covers the metal layer, the conductive layer of the third substrate, and an inner wall of the through hole, and fills the blind holes to define multiple conductive holes. The conductive material layer, the metal layer, and the conductive layer are patterned to form a first external circuit layer located on the first substrate and electrically connected to the conductive pillars, and a second external circuit layer located on the insulating layer and electrically connected to the conductive holes, and define a conductive through hole structure connecting the first external circuit layer and the second external circuit layer and located in the through hole.