Embedded Trench Circuit Layer for Printed Circuit Board Reliability
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Solution Overview
Problem
Conventional methods for manufacturing printed circuit boards face challenges in achieving high-density, reliable circuit patterns with fine features, as they tend to separate from the insulating layer, leading to reduced reliability and increased manufacturing costs due to complex processes and alignment issues.
Innovation Solution
A printed circuit board is constructed using a build-up method with an embedded trench circuit layer on the outermost layer via imprinting technology, while other layers are formed using a semi-additive process, reducing separation risks and manufacturing costs, and improving interlayer alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional semi-additive process is used to form fine circuit patterns, then circuit fineness is improved, but the circuit pattern protrudes from the insulating layer causing separation and reduced reliability
Solution Approach 1:
Instead of allowing the circuit pattern to protrude outward from the insulating layer surface, the invention inverts the approach by embedding the circuit pattern within the insulating layer. The circuit pattern is formed at a lower level than the insulating layer surface, eliminating the protrusion that causes separation and improving adhesive reliability.
Solution Approach 2:
The circuit pattern is nested within the insulating layer structure. The insulating layer completely covers the circuit pattern from above, creating a nested configuration where the circuit pattern is embedded inside the insulating layer rather than protruding outward, thereby eliminating separation issues.
2Reliability
If LPP (Laser Patterning Process) is used to form embedded circuit patterns, then separation of circuit layers is prevented, but manufacturing complexity and cost increase due to additional grinding processes
Solution Approach 1:
The invention extracts and eliminates the complex grinding process from the manufacturing sequence. Instead of using LPP followed by grinding to achieve embedded circuits, the method directly forms the circuit pattern at the desired embedded level through a simplified process, removing the unnecessary grinding step while maintaining the embedded structure.
Solution Approach 2:
The circuit pattern is formed in advance at the correct embedded level within the insulating layer during the initial patterning process, rather than forming it protruding and then requiring subsequent grinding to achieve the embedded state. This preliminary positioning eliminates the need for later corrective grinding operations.
3Ease of manufacture
If conventional semi-additive process is used for multilayered PCBs, then manufacturing simplicity is maintained, but interlayer alignment issues arise and productivity decreases
Solution Approach 1:
The manufacturing process is segmented into distinct stages: forming the circuit pattern at the embedded level, building up the insulating layer to cover it, and then proceeding to subsequent layer formations. This segmentation allows each step to be optimized independently, improving overall manufacturing efficiency while maintaining simplicity.
Solution Approach 2:
The circuit pattern is preliminarily formed at the correct position and level before the insulating layer is fully built up. This preliminary action ensures proper interlayer alignment is established early in the process, preventing alignment issues in subsequent layers and improving overall manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution minimizes the separation of circuit layers, reduces manufacturing time and costs, and enhances interlayer alignment, making it suitable for high-density and reliable printed circuit boards.
Implementation Method 1
an electroless plating layer 14 is formed not only on the to insulating layer 12 but also on an inner surface of the via-hole 13a
Implementation Method 2
the electrolytic plating layer 15 is formed on the electroless plating layer 14
Data Source
AI summary
Disclosed are a printed circuit board including a core substrate including core circuit layers on both sides thereof, a first build-up layer formed on one side of the core substrate, a second build-up layer formed on the other side of the core substrate, and first and second protective layers formed on the first and second build-up layers, respectively, wherein the first build-up layer includes a trench circuit layer as an outermost circuit layer formed by a trench technology, the trench circuit layer is embedded in the first protective layer, and an outermost circuit layer of the second build-up layer is embedded in an outermost insulating layer of the second build-up layer, and a method of manufacturing the printed circuit board. Thanks to the formation of the outermost circuit layer by the trench technology, it is difficult to separate the outermost circuit layer from the outermost insulating layer.