PCB Via Structure for BGA Heat Dissipation and Signal Integrity

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Solution Overview

Problem

Conventional printed circuit boards (PCBs) for ball grid array (BGA) integrated circuits (ICs) face challenges in thermal electrical problems, such as heat dissipation, cross talk, signal propagation delay, and electromagnetic interference, which affect the reliability and quality of the finished product.

Innovation Solution

The PCB design incorporates a build-up layer structure with vertical interconnect structures, including buried and blind vias, and straight through vias to enhance heat dissipation by providing a direct path to ground planes, improving thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of input/output connections in BGA IC is increased to support multi-functionality, then the functionality and pin count are improved, but thermal electrical problems such as heat dissipation, cross talk, signal propagation delay, and electromagnetic interference worsen

Engineering Contradiction:
Improvemulti-functionalityVSAvoidheat dissipation
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from conventional two-dimensional PCB layouts to a three-dimensional build-up layer structure with vertical interconnects (buried vias, blind vias, through vias) extending through multiple layers. This vertical dimension provides dedicated thermal pathways that separate heat dissipation routes from signal paths, reducing thermal electrical problems while maintaining high pin-count connectivity for multi-functional BGA ICs

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the interconnect structure into distinct functional zones: buried vias for thermal management, blind vias for signal routing, and through vias for ground connections. This segmentation allows independent optimization of thermal and electrical performance, enabling high functionality while mitigating heat dissipation issues through dedicated thermal pathways

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the number of input/output connections in BGA IC is increased to support multi-functionality, then the functionality and pin count are improved, but thermal electrical problems such as heat dissipation, cross talk, signal propagation delay, and electromagnetic interference worsen

Engineering Contradiction:
Improvemulti-functionalityVSAvoidquality of finished product
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent transitions from conventional two-dimensional PCB layouts to a three-dimensional build-up layer structure with vertical interconnects (buried vias, blind vias, through vias) extending through multiple layers. This vertical dimension provides dedicated thermal pathways that separate heat dissipation routes from signal paths, reducing thermal electrical problems while maintaining high pin-count connectivity for multi-functional BGA ICs

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces ground planes as intermediary structures between signal layers and external connections. These ground planes serve as electromagnetic shields and reference potentials, reducing cross-talk and signal propagation delays. The build-up layer structure with embedded ground planes acts as an intermediary that maintains signal integrity and product quality even with increased I/O connections

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional PCB structures are used for BGA IC mounting, then manufacturing simplicity is maintained, but heat dissipation capacity is insufficient

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidheat dissipation capacity
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent transitions from conventional two-dimensional PCB layouts to a three-dimensional build-up layer structure with vertical interconnects (buried vias, blind vias, through vias) extending through multiple layers. This vertical dimension provides dedicated thermal pathways that separate heat dissipation routes from signal paths, reducing thermal electrical problems while maintaining high pin-count connectivity for multi-functional BGA ICs

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs a composite build-up layer structure combining multiple materials with different thermal and electrical properties. The structure integrates dielectric layers, conductive vias, and ground planes to create a composite system that optimizes both thermal management and electrical performance while remaining manufacturable using standard PCB fabrication processes

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively dissipates heat from BGA ICs, enhancing the reliability and performance of electronic systems by reducing thermal impedance and providing a shorter heat dissipation path.

Implementation Method 1

The through via is a straight through via... providing a direct path to ground planes, improving thermal management... providing a shorter heat dissipation path

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP4432788B1Electronic system
Publication Date: 2025.12.10 MEDIATEK INC
  • EP4432788B1 patent drawingFigure 1
  • EP4432788B1 patent drawingFigure 2
  • EP4432788B1 patent drawingFigure 3

AI summary

An electronic system is provided. The electronic system includes a base and a semiconductor device. The base having a device-attach region includes a build-up layer structure, a vertical interconnect structure and a first through via. The vertical interconnect structure and the first through via are formed passing through the build-up layer structure and located in the device-attach region. The vertical interconnect structure includes a buried via and a blind via electrically coupled to the buried via. The first through via is a straight through via. The semiconductor device is mounted on the device-attach region of the base.