Printed Wiring Board With Localized Via Diameter Optimization

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Solution Overview

Problem

Existing printed wiring boards face challenges in balancing the strength and warpage of their central and peripheral areas, leading to potential data transmission issues and reduced connection reliability due to uneven via conductor diameters and wiring densities.

Innovation Solution

A printed wiring board design featuring a core substrate with distinct central and outer peripheral areas, where the central area has smaller via conductors and no lowermost via conductors, while the outer peripheral area has larger via conductors, enhancing strength and reducing warpage, and maintaining electrical independence between the two areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If via conductors are made larger in diameter to increase strength, then connection reliability improves, but warpage increases and data transmission speed decreases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidwarpage
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent applies different via conductor diameters in different regions: larger diameters in the outer peripheral area for strength and reliability, smaller diameters in the central area for reduced warpage and improved data transmission. This local differentiation resolves the contradiction by optimizing each region's via conductor size according to its specific functional requirements.

Inventive Principle:
Principle #3Local quality

2Speed

If via conductors are made smaller in diameter to reduce warpage and increase data transmission speed, then warpage reduces and data transmission speed increases, but connection reliability decreases

Engineering Contradiction:
Improvedata transmission speedVSAvoidconnection reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent differentiates via conductor diameters by region: smaller diameters in the central area enable faster data transmission with reduced warpage, while larger diameters in the outer peripheral area ensure connection reliability. This spatial differentiation allows simultaneous optimization of speed and reliability in different functional zones.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If uniform via conductor diameters are used throughout the board, then manufacturing simplicity is maintained, but strength and warpage cannot be balanced

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidstrength balance
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The patent implements non-uniform via conductor diameters with at least two different sizes across the printed wiring board. This local differentiation enables balanced strength distribution and warpage control, resolving the contradiction by prioritizing performance optimization over manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

4Strength

If larger via conductors are used in the outer peripheral area, then strength and connection reliability improve, but manufacturing complexity increases

Engineering Contradiction:
Improvestructural strengthVSAvoidmanufacturing complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent concentrates larger via conductors in the outer peripheral area where structural strength is most critical, while using smaller via conductors in the central area. This localized approach optimizes strength where needed without unnecessarily complicating the entire manufacturing process, balancing structural requirements with manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10636741B2Printed wiring board
Publication Date: 2020.04.28 IBIDEN CO LTD
  • US10636741B2 patent drawing
  • US10636741B2 patent drawing
  • US10636741B2 patent drawing

AI summary

A printed wiring board includes a core substrate, and a build-up layer formed on the substrate. The substrate includes core material, third conductor layer, fourth conductor layer, and through-hole conductors. The build-up layer is formed on the core material and third conductor layer and includes insulating layers, first conductor layers, and via conductors. The build-up layer has central area and outer peripheral area such that the via conductors include central area via conductors and outer peripheral area via conductors, diameter of central area via conductor is smaller than diameter of outer peripheral area via conductor, the outermost first conductor layer includes first pads to mount first electronic component and second pads to mount second electronic component, the first and second pads are connected to each other via the central via conductors, and the lowermost insulating layer does not have the via conductors in the central area of the build-up layer.