Multilayer Printed Wiring Board Via Diameter Variation
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Solution Overview
Problem
Existing multi-layer printed wiring boards face challenges in achieving high connection reliability and integration due to stress differences between the throughhole structure and the insulative core substrate, leading to deformation and potential bonding issues between filled vias and cover plated layers.
Innovation Solution
The design incorporates a multi-layer printed wiring board with a core substrate, first and second interlayer insulation layers, and filled vias where the bottom diameter of the second filled via is smaller than the first, allowing for reduced stress concentration and improved connection reliability by varying the diameters and positions of the filled vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the bottom diameter of the second filled via is made equal to or larger than the first filled via, then the manufacturing process is simplified, but stress concentration increases and connection reliability deteriorates
Solution Approach 1:
The patent applies local quality by making the bottom diameter of the second filled via smaller than that of the first filled via. This local variation in diameter creates a stepped configuration that reduces stress concentration at the interface between the filled via and the cover plated layer, thereby improving connection reliability without requiring complex manufacturing processes.
2Ease of manufacture
If uniform via diameters are used throughout all interlayer insulation layers, then the manufacturing process is simpler, but stress distribution is uneven leading to bonding issues
Solution Approach 1:
The patent implements local quality by varying the bottom diameter of filled vias across different interlayer insulation layers. Specifically, the second filled via has a smaller bottom diameter than the first filled via, creating a stepped structure that distributes stress more evenly and prevents bonding issues between the filled vias and cover plated layers.
3Reliability
If the filled via diameter is large, then the electrical connection is more robust, but stress concentration increases causing deformation under thermal cycling
Solution Approach 1:
The patent applies parameter changes by modifying the bottom diameter parameter of the filled vias. The second filled via has a smaller bottom diameter than the first filled via, which reduces stress concentration while maintaining adequate electrical connection. This parameter optimization ensures structural stability during thermal cycling without compromising electrical reliability.
Data Source
AI summary
A method of manufacturing a multi-layer printed wiring board including forming a core substrate, forming a first interlayer insulation layer over the core substrate, forming a first filled via in the first interlayer insulation layer, the first filled via having a bottom portion having a first diameter, forming a second interlayer insulation layer over the first interlayer insulation layer, and forming a second filled via in the second interlayer insulation layer, the second filled via having a bottom portion having a second diameter smaller than the first diameter.