PCB Via Pad Layout for Dense Decoupling Capacitor Placement

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Solution Overview

Problem

The challenge in electronic product design is achieving optimal placement of decoupling capacitors on printed circuit boards (PCBs) due to surface area limitations and increased pin-count of ball grid array (BGA) integrated circuits, which restricts the number and placement of decoupling capacitors, leading to manufacturing difficulties and reduced effectiveness.

Innovation Solution

A novel via pad layout on multi-layer PCBs with angled extensions and non-orthogonal arrangements allows for greater spacing between surface-mount devices (SMDs) like capacitors, ensuring adequate component gaps to meet Design for Manufacturability rules, thereby facilitating high-yield manufacturing and effective decoupling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If decoupling capacitors are placed closer to BGA pins to improve decoupling effectiveness, then decoupling performance improves, but manufacturing difficulty increases due to insufficient component gaps

Engineering Contradiction:

Improvedecoupling effectivenessVSAvoidmanufacturing yield

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The via pad layout uses non-orthogonal arrangements and asymmetric extension patterns (central-extensions and first-extensions) that create unequal spacing in different directions. This asymmetric design allows sufficient component gaps for manufacturing while enabling closer placement of decoupling capacitors to BGA pins for improved decoupling effectiveness.

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The patent transitions from traditional orthogonal (two-dimensional grid) via pad arrangements to non-orthogonal layouts that utilize angular dimensions. By introducing angled extensions and non-right-angle configurations, the design creates additional spatial dimensions for optimization, allowing simultaneous achievement of close capacitor placement and adequate manufacturing gaps.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If more decoupling capacitors are added to compensate for increased BGA pin-count, then decoupling coverage improves, but surface area consumption increases

Engineering Contradiction:

Improvedecoupling coverageVSAvoidPCB surface area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple via pads into integrated via pad structures with shared extensions and common reference points. By merging adjacent via pads into unified layouts with central-extensions and first-extensions, the design reduces redundant spacing and minimizes total surface area while maintaining adequate decoupling capacitor placement options.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The via pad layout design creates multi-functional structures that serve both decoupling and manufacturing requirements simultaneously. The non-orthogonal arrangement with angled extensions provides universal applicability for multiple decoupling capacitor placements while inherently providing the spacing needed for manufacturing, eliminating the need for separate optimization of each function.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Device complexity

If via pads are arranged in orthogonal patterns for simplicity, then layout complexity decreases, but component spacing becomes insufficient for manufacturing rules

Engineering Contradiction:

Improvevia pad layout complexityVSAvoidcomponent gap adequacy

Core Design Contradiction:

Device complexityVSEase of manufacture

Solution Approach 1:

The patent changes the geometric parameters of via pad arrangements from standard orthogonal (90-degree) configurations to non-orthogonal layouts with specific angular relationships. By modifying the angle parameters and extension lengths, the design achieves both manufacturing adequacy and manageable complexity through systematic parameter optimization rather than arbitrary complexity.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentEP4712707A1High-density decoupling capacitor routing optimizing capacitance with consideration for high-yield manufacturing

Publication Date: 2026.03.18 NOKIA SOLUTIONS & NETWORKS OY

Figure 1A
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Figure 2A

AI summary

A multi-layer printed circuit board includes a substrate having a first side and a second side opposite the first side, a central via pad disposed on the first side and having a plurality of central-extensions extending outwardly therefrom, a first via pad disposed on the first side and having at least one first-extension extending outwardly therefrom, a second via pad disposed on the first side and having at least one first-extension extending outwardly therefrom, wherein each central-extension has a first-connection-edge, wherein each first-extension has a second-connection-edge, wherein a first first-connection edge of a first central-extension faces a second-connection-edge of the first via pad, and a line perpendicular to the first first-connection edge and to the second-connection-edge of the first via pad forms an angle with a via-to-via axis line between the central via pad and the first via pad, and the angle is greater than a predetermined threshold angle.