PCB Via Non-Functional Pad Removal for Impedance Matching
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Solution Overview
Problem
High-speed signal transmission in printed circuit boards (PCBs) is hindered by signal attenuation and inefficiencies due to impedance mismatches between signal traces and plated vias, with current designs either leaving or removing non-functional pads without consideration for electrical characteristics.
Innovation Solution
The selective removal of non-functional pads in PCBs is optimized based on impedance profiling and simulation to match the electrical impedance of signal paths, ensuring optimal operating characteristics and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If non-functional pads are left in place during PCB manufacturing, then the lamination process is facilitated and board construction is simplified, but electrical impedance mismatches occur causing signal degradation
Solution Approach 1:
The patent extracts and removes non-functional pads from specific via locations where they would create impedance mismatches. By selectively removing these pads based on impedance profiling and simulation results, the patent eliminates the harmful electrical effects while preserving the manufacturing benefits where pads are retained in other locations.
Solution Approach 2:
The patent applies different pad configurations to different via locations based on their electrical characteristics. Instead of a uniform approach, impedance profiling identifies specific locations where non-functional pads should be removed, while other locations retain pads for manufacturing support. This localized optimization resolves the contradiction between manufacturing ease and signal quality.
2Reliability
If all non-functional pads are removed to improve signal quality, then impedance matching improves, but manufacturing complexity increases and board construction becomes more difficult
Solution Approach 1:
The patent implements selective pad removal rather than universal removal. Impedance profiling and simulation identify specific via locations where non-functional pads should be removed to improve signal quality, while other via locations retain pads to maintain manufacturing ease. This localized approach optimizes signal quality without unnecessarily complicating manufacturing.
3Speed
If high-speed signal transmission is implemented in PCBs, then communication capability is enhanced, but signal attenuation and impedance mismatches increase
Solution Approach 1:
The patent performs impedance profiling and simulation during the design phase to identify and correct potential impedance mismatches before manufacturing. By determining the optimal pad configuration for each via in advance through simulation, the patent prevents signal degradation issues that would otherwise occur during high-speed operation, ensuring signal integrity is maintained at high transmission speeds.
Solution Approach 2:
The patent modifies the electrical parameters of via structures by selectively removing non-functional pads to change the impedance characteristics. This parameter adjustment optimizes the electrical performance of vias to match the required impedance for high-speed signal transmission, reducing reflections and signal degradation while maintaining the ability to support high data rates.
Data Source
AI summary
The various structures forming communication paths on a printed circuit board can create several undesired effects, especially when high frequency signals are considered. Non-functional pads created during the manufacturing process have the potential to create an undesired effect, but when the overall collection of non-functional pads are carefully configured, an optimized communication path can be formed. More specifically, by selectively removing some collection of the non-functional pads, the high frequency characteristics of the communication paths can be optimized.