PCB Via Pattern for GPU Crosstalk Reduction

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Solution Overview

Problem

High data rates in graphic processor units (GPUs) lead to increased crosstalk between signal lines, which is exacerbated by the rising number of signal and ground vias, posing design challenges in maintaining high power performance levels.

Innovation Solution

A multi-layered printed circuit board (PCB) design featuring a signal array region with signal and ground vias arranged in a pattern that extends into an inner current power layer, forming current power paths at least 50% as wide as the ball pad pitch, and a 4:1 ground via to signal via ratio, reducing crosstalk while maintaining power delivery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the number of signal and ground vias is increased to support high data rates, then signal transmission capability is improved, but crosstalk between signal lines increases

Engineering Contradiction:
Improvedata rateVSAvoidcrosstalk
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an intermediary ground via between signal vias to shield and isolate them from each other. This ground via acts as a mediator that blocks electromagnetic interference between adjacent signal lines, reducing crosstalk while allowing high data rate transmission. The ground via is positioned between signal vias and connected to the ground plane, creating an electromagnetic shield.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a composite via structure combining signal vias and ground vias in a specific pattern. This composite arrangement creates a shielded transmission line structure where ground vias form an electromagnetic shield around signal vias, reducing crosstalk while maintaining high-speed signal integrity.

Inventive Principle:
Principle #40Composite materials

2Object-generated harmful factors

If ground via density is increased to reduce crosstalk, then signal quality is improved, but power delivery capability may be compromised

Engineering Contradiction:
ImprovecrosstalkVSAvoidpower delivery
Core Design Contradiction:
Object-generated harmful factorsVSPower

Solution Approach 1:

The patent segments the via function by creating distinct signal vias and ground vias with different roles. Ground vias are specifically positioned to provide shielding and reduce crosstalk, while signal vias maintain power and signal transmission. This segmentation allows ground via density to be optimized for crosstalk reduction without compromising power delivery through signal vias.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by positioning ground vias specifically in regions where crosstalk is most problematic, rather than uniformly distributing all vias. Ground vias are placed between signal vias carrying high-speed differential signals to provide localized shielding where needed, while maintaining adequate power delivery paths.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11439010B2Via pattern for framebuffer interfaces
Publication Date: 2022.09.06 NVIDIA CORP
  • US11439010B2 patent drawing
  • US11439010B2 patent drawing
  • US11439010B2 patent drawing

AI summary

This disclosure provides a multi-layered printed circuit board (PC) that has signal array region. The signal array region has a width and circumscribes a power core region and has signal vias connected to respective signal ball pads, and ground vias connected to respective ground ball pads within the signal array region that have an associated ball pad pitch. The PCB also has an inner current power layer. The signal and ground vias are arranged on the component layer in a pattern and extend into the inner current layer. The pattern forms current power paths across the width of the signal array region, such that the current power paths have a width that is at least about 50% as wide as the ball pad pitch.