PCB Via Recess Structure for Signal and EMI Isolation
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Solution Overview
Problem
Existing printed circuit boards face challenges in electrically separating patterns connected through vias, leading to signal interference and electromagnetic interference due to residual plating lines.
Innovation Solution
A printed circuit board design that includes a recess formed by removing a portion of the area where a via was formed, electrically separating the first pattern from the second pattern, and reducing the length of stubs without interfering with signal line connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a via is used to electrically connect patterns between layers, then electrical connectivity is achieved, but residual plating lines cause signal interference and electromagnetic interference
Solution Approach 1:
The harmful residual plating line is extracted and removed from the circuit board after the via is formed. The plating line is completely taken out from the surface, eliminating the source of signal interference and electromagnetic interference while preserving the electrical connectivity function of the via.
Solution Approach 2:
The via structure is segmented into two functional parts: the conductive portion that provides electrical connectivity between layers, and the removed plating line portion that would cause interference. This segmentation allows the useful function to be preserved while the harmful part is eliminated.
2Reliability
If electrolytic plating is performed on pads, then reliability and oxidation prevention are improved, but a plating line must be designed and subsequently removed
Solution Approach 1:
The plating line, which is only needed temporarily for the electrolytic plating process, is extracted and removed after serving its purpose. This eliminates the need to maintain complex plating line structures in the final product while still achieving the beneficial pad treatment.
Solution Approach 2:
The electrolytic plating is performed as a preliminary action before final circuit completion. The plating line is temporarily created, used for the plating process, and then removed. This preliminary action achieves pad protection without requiring permanent plating line structures.
3Object-generated harmful factors
If plating lines are removed after electrolytic plating, then signal interference is reduced, but a portion of the plating line may remain and cause interference
Solution Approach 1:
The plating line is completely extracted from the circuit board using a removal process that ensures no portions remain. This complete extraction eliminates the risk of residual plating lines causing signal interference, achieving both interference reduction and complete removal reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces signal interference and electromagnetic interference by electrically separating patterns, minimizing the length of stubs, and preventing signal attenuation.
Implementation Method 1
conductive material in the via hole and in electrical contact with the first signal trace
Data Source
Figure 1~2
Figure 3a~3b
Figure 3c
AI summary
According to an embodiment, a printed circuit board and an electronic device is disclosed. The printed circuit board includes a first pattern configured to be formed in a first layer. The printed circuit board also includes a second pattern configured to be formed in at least one second layer under the first layer. The printed circuit board also includes a via configured to electrically connect the first pattern to the second pattern. The printed circuit board further includes a recess configured to be formed by removing at least a portion of an area in which the via is formed and to electrically separate the first pattern from the second pattern.