Multi-Layer PCB Via Structure for Thermal Management
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Solution Overview
Problem
Multi-layer printed circuit boards (PCBs) with via holes face a challenge where the excessive cooling speed of pads can lead to insufficient soldering temperatures, affecting processing efficiency and yield rates.
Innovation Solution
The design incorporates multiple through holes in the base-layer metal, middle metal layers, and top-layer metal, with hole groups containing passing holes that surround the through holes, forming connecting channels to reduce the conductive area and cooling speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If via holes are added to isolate signals and reduce crosstalk interference, then signal isolation is improved, but the cooling speed of pads becomes excessively fast causing insufficient soldering temperature
Solution Approach 1:
The patent segments the through-hole structure by introducing multiple passing holes that divide the original through-hole into multiple smaller sections. These passing holes are distributed around the through-hole in a segmented pattern, which reduces the continuous conductive area and thereby reduces the cooling speed while maintaining signal isolation functionality.
Solution Approach 2:
The patent applies local quality by creating non-uniform distribution of passing holes around the through-hole. The passing holes are strategically positioned to locally reduce heat conduction in specific areas while maintaining overall signal isolation. This localized modification allows differential thermal management across different regions of the pad structure.
2Temperature
If the conductive area around through holes is reduced to decrease cooling speed, then soldering temperature is improved, but the ability to isolate signals may be affected
Solution Approach 1:
The patent employs asymmetric arrangement of passing holes around the through-hole structure. The passing holes are not uniformly distributed but positioned asymmetrically to optimize both thermal management and signal isolation performance. This asymmetric configuration allows different regions to serve different functions - some areas prioritize heat reduction while others maintain electrical isolation.
Solution Approach 2:
The patent transitions from a two-dimensional planar view to a three-dimensional spatial arrangement by positioning passing holes at different heights and radial distances from the through-hole. This dimensional approach allows simultaneous optimization of thermal properties (by reducing conductive path length) and electrical isolation (by maintaining appropriate spacing and positioning) without compromising either function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the cooling speed around through holes, preventing excessively low pad temperatures and enhancing soldering efficiency while maintaining high-frequency transmission and signal isolation.
Implementation Method 1
The passing holes around the through hole may decrease the conductive area around the through hole to reduce the cooling speed
Data Source
AI summary
A multi-layer printed circuit board includes a base-layer metal, multiple middle metal layers and a top-layer metal. The middle metal layers are stacked on the base-layer metal sequentially. The top-layer metal is disposed on the middle metal layers. The base-layer metal, each middle metal layer and the top-layer metal are formed with multiple through holes respectively. Part of the middle metal layers are separately formed with multiple hole groups corresponding to the through holes. Each hole group includes multiple passing holes. The passing holes jointly surround a corresponding one of the through holes to form multiple connecting channels. Therefore, the multi-layer printed circuit board may reduce the cooling speed of the through holes to avoid an excessively low temperature of a pad to affect the soldering efficiency with keeping the high-frequency transmission and the signal isolation.