PCB Warpage Control Using Voltage Switchable Dielectric Materials
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Solution Overview
Problem
The incorporation of voltage switchable dielectric materials (VSDM) into printed circuit boards (PCBs) often leads to warpage due to their unique thermal, elastic, and dimensional properties, which can result in unbalanced substrates and loss of dimensional control during processing.
Innovation Solution
A balance region is incorporated into the PCB design to counteract the imbalance induced by the VSDM, which can include additional or modified prepreg layers, different materials, or adjustments in the stackup structure to maintain planarity and meet specifications, such as IPC-4101A flatness standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage switchable dielectric material (VSDM) is incorporated into PCB, then electrical protection is improved, but substrate planarity deteriorates due to warpage
Solution Approach 1:
The patent applies asymmetry by intentionally creating an unbalanced prepreg stackup where the number of prepreg layers above and below the VSDM are unequal. This asymmetric configuration allows the higher-modulus VSDM to be positioned closer to one surface, and by strategically placing balance regions with appropriate prepreg layers, the design compensates for warpage while maintaining the electrical protection function of the VSDM.
Solution Approach 2:
The patent changes material parameters by selecting prepreg layers with different elastic moduli and thicknesses to create balance regions. By adjusting the stiffness and distribution of prepreg materials above and below the VSDM, the design optimizes both the mechanical balance (reducing warpage) and the electrical protection functionality, transforming the material composition parameters to resolve the contradiction.
2Reliability
If VSDM is incorporated into PCB, then ESD protection is improved, but dimensional control deteriorates during processing
Solution Approach 1:
The patent applies preliminary action by designing the balanced stackup configuration before the actual PCB manufacturing process. The balance regions and prepreg layer distribution are predetermined in the design phase to pre-compensate for the warpage and dimensional changes that will occur during subsequent processing steps, ensuring dimensional control is maintained throughout manufacturing while preserving ESD protection.
Solution Approach 2:
The patent modifies processing parameters by adjusting the curing temperature profile and pressure application to accommodate the unique properties of VSDM and the balanced stackup configuration. By optimizing these processing parameters, the patent ensures that the VSDM maintains its electrical protection properties while the substrate achieves the desired dimensional stability during and after processing.
3Reliability
If VSDM is incorporated into PCB, then electrical conductivity switching is improved, but substrate balance deteriorates
Solution Approach 1:
The patent applies asymmetry by creating an unbalanced prepreg stackup that intentionally positions the VSDM closer to one surface of the PCB. This asymmetric configuration allows the high-electric-field-withstand-strength VSDM to be optimally positioned for electrical conductivity switching, while balance regions with specially selected prepreg layers compensate for the resulting substrate imbalance, maintaining overall structural stability.
Solution Approach 2:
The patent uses composite materials by combining VSDM with prepreg layers of varying elastic moduli and material compositions to create a balanced stackup. The composite structure integrates materials with different mechanical and electrical properties, where the VSDM provides electrical conductivity switching and the surrounding prepreg composite materials provide mechanical balance and structural stability.
Data Source
AI summary
A method for designing a printed circuit board to meet a specification is described. A first voltage switchable dielectric material is placed in apposition with a first copper foil. A second voltage switchable dielectric material is placed in apposition with a second copper foil. An arcuate portion of the first copper foil is placed in apposition with a first side of an aluminum member, an adhesive substance being situated between the first copper foil and the first side of the aluminum member. An arcuate portion of the second copper foil in is placed apposition with a second side of the aluminum member, an adhesive substance being situated between the second copper foil and the second side of the aluminum member.