Printed Wiring Board Warping Prevention via CTE Control
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Solution Overview
Problem
The miniaturization of electronic components and increased frequencies of IC chips require finer wiring and effective heat dissipation to prevent thermal stress and warping in printed wiring boards, especially when using thinner substrates without glass fiber core materials.
Innovation Solution
A printed wiring board design featuring a core substrate with a low thermal expansion coefficient, adjusted thicknesses of interlayer insulation layers, and a through-hole conductor to connect conductive circuits, ensuring that the thermal expansion coefficient is within the range of 0.5×10−6 to 2.5×10−6/GPa·mm·K, thereby preventing warping and enhancing heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If interlayer insulation layers without core material are laminated on a core substrate, then the substrate can be made thinner and fine-pattern wiring can be formed, but warping occurs due to thermal expansion mismatch
Solution Approach 1:
The patent applies parameter changes by precisely controlling the thermal expansion coefficient of the core substrate to fall within 30-70 ppm/°C and adjusting the thickness ratio between the core substrate and interlayer insulation layers. This ensures that the composite structure maintains dimensional stability and prevents warping while achieving thin substrate design.
Solution Approach 2:
The patent uses composite materials by combining the core substrate with specific thermal expansion properties with interlayer insulation layers without core material. This composite structure allows the substrate to achieve both thinness and resistance to warping through the synergistic combination of different materials with complementary properties.
2Loss of energy
If the substrate is made thinner to reduce thermal stress, then heat dissipation is improved, but warping occurs when fine-pattern wiring is formed
Solution Approach 1:
The patent controls the thickness of the core substrate and interlayer insulation layers within specific ranges, and adjusts the thermal expansion coefficient to 30-70 ppm/°C. This parameter optimization enables effective heat dissipation through the thin substrate while preventing warping by balancing thermal expansion characteristics.
3Stability of the object's composition
If inorganic particles are added to reduce thermal expansion coefficient, then warping is prevented, but manufacturing complexity increases
Solution Approach 1:
The patent specifies that the thermal expansion coefficient of the core substrate should be controlled within 30-70 ppm/°C, which can be achieved by adding inorganic particles such as glass beads or ceramic particles to the resin matrix. This parameter control prevents warping while maintaining manufacturability through established composite material processing techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents warping and allows for thinner, more integrated wiring with improved heat dissipation, enabling the use of fine-pattern wiring and efficient IC chip mounting without compromising substrate integrity.
Implementation Method 1
a through-hole conductor formed in the penetrating hole and connecting the first conductive circuit and the second conductive circuit
Implementation Method 2
heat dissipation is necessary to reduce thermal stress caused by an increase of heat
Implementation Method 3
setting the thermal expansion coefficient of interlayer insulation layers to be 35 ppm or lower in a multilayer circuit board formed by laminating single-sided substrates
Data Source
AI summary
[Subject Matter] To provide a printed wiring board in which no warping occurs even if interlayer insulation layers without core material are laminated on a core substrate.[Solution(s)] To lower the thermal expansion coefficient (CTE) to 20˜40 ppm, inorganic particles are added to core substrate 30 formed by impregnating glass-cloth core material with glass-epoxy resin. Furthermore, thickness (a) of core substrate 30 is set at 0.2 mm, thickness (b) of upper-surface-side first interlayer insulation layer (50A) at 0.1 mm, and thickness (c) of lower-surface-side second interlayer insulation layer (50B) at 0.1 mm. In setting so, using thin core substrate 30 and interlayer insulation layers (50A, 50B) without core material, it is thought that warping does not occur in the printed wiring board.