Simplified PCB Wire Pattern and Through-Hole Contact Design
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Solution Overview
Problem
The high cost and complexity of semiconductor packages are exacerbated by the expensive fabrication processes of conventional printed circuit boards (PCBs) with two-layer wire patterns, which reduce yield and increase the overall cost of semiconductor packages, particularly due to the high cost of forming via holes and complicated fabrication processes.
Innovation Solution
A printed circuit board (PCB) with a simplified one-layer wire pattern and through-hole contacts, where the wire pattern is formed on one surface of the body resin, and the through-hole contacts extend through the resin, reducing the need for complex via hole formation and allowing for a simpler, more cost-effective fabrication process, while enhancing the joining characteristics and reliability of minute bumps during flip-chip bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional two-layer wire pattern PCB is used, then the electrical connection functionality is improved, but the processing cost increases and yield decreases
Solution Approach 1:
The patent extracts and eliminates the unnecessary second wire layer and via hole structures from conventional PCBs. By using a single wire layer combined with strategically positioned through-hole contacts, the design removes complex fabrication steps while maintaining essential electrical connectivity functions.
Solution Approach 2:
The patent segments the electrical connection function into two distinct components: a single wire layer for signal routing and through-hole contacts for vertical interconnection. This segmentation allows each component to be optimized independently, simplifying the overall structure and reducing manufacturing complexity.
2Reliability
If via hole formation is performed in conventional PCBs, then electrical connections between layers are achieved, but the fabrication complexity and cost increase
Solution Approach 1:
The patent removes the complex via hole formation process entirely by using through-hole contacts that are integrated into the single-layer structure. This extraction eliminates multiple fabrication steps including drilling, plating, and insulation layer management associated with conventional via holes.
Solution Approach 2:
Instead of forming via holes through insulated layers to connect wire layers, the patent inverts the approach by using exposed through-hole contacts that directly provide electrical connection points. This inversion simplifies the fabrication process by eliminating the need for insulated via holes and complex multi-layer alignment.
3Adaptability or versatility
If a two-layer wire pattern is used, then the circuit functionality is improved, but the manufacturing yield decreases
Solution Approach 1:
The patent extracts the essential circuit functionality into a single wire layer configuration, removing the second layer that introduces alignment and fabrication challenges. This extraction maintains necessary electrical connections while eliminating sources of manufacturing defects and yield loss.
4Reliability
If conventional PCB structures are used, then the electrical connectivity is achieved, but the overall semiconductor package cost increases
Solution Approach 1:
The patent extracts and eliminates the costly multi-layer PCB structure, retaining only the essential single-layer wire pattern with through-hole contacts. This extraction significantly reduces material costs and fabrication expenses while preserving the core electrical connectivity function needed for semiconductor package operation.
Data Source
AI summary
A printed circuit board (PCB) includes a wire pattern that has a low processing cost and a high yield by simplifying the structure of the PCB and can increase the joining characteristics and reliability of minute bumps when a flip-chip bonding process is performed. The PCB includes a body resin layer having lower and upper surfaces, a wire pattern on or in one of the upper and lower surfaces of the body resin layer, at least one through-hole contact extending from the wire pattern through the body resin layer, and a solder resist on the upper and lower surfaces of the body resin layer, openings of the solder resist corresponding to at least one of a solder ball land and a bump land, the solder ball land and the bump land being configured to couple the PCB to a semiconductor chip. If the solder ball land is on the one-layer wire pattern, the bump land is on the through-hole contact, and if the bump land is on the wire pattern, the solder ball land is on the through-hole contact.