PCB Wiring Layers with Varying Elastic Moduli for Warpage Control
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Solution Overview
Problem
The challenge is to reduce the thickness of semiconductor packages while maintaining reliability and preventing warpage due to thermal expansion coefficient mismatches between semiconductor chips and printed circuit boards (PCBs).
Innovation Solution
The solution involves creating PCBs with multiple wiring layers having varying elastic moduli and grain sizes, where the elastic modulus and grain size of conductive materials in each wiring layer differ, allowing for differential thermal expansion compensation and preventing warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the thickness of semiconductor packages is reduced, then the size and portability of electronic devices are improved, but warpage due to thermal expansion coefficient mismatches occurs
Solution Approach 1:
The patent applies local quality by varying the elastic modulus of conductive materials in different wiring layers. Specifically, wiring layers closer to the semiconductor chip have higher elastic moduli to provide stiffness against warpage, while outer wiring layers have lower elastic moduli. This spatial variation in material properties allows the thin PCB to resist thermal expansion-induced warpage without increasing overall package thickness.
Solution Approach 2:
The patent employs composite materials by creating a multi-layered wiring structure where each layer has different elastic modulus characteristics. The conductive materials in different wiring layers are designed with graded elastic moduli, forming a composite structure that collectively compensates for thermal expansion mismatches between the semiconductor chip and PCB, thereby preventing warpage in reduced-thickness packages.
2Stability of the object's composition
If wiring layers with different elastic moduli are used, then warpage is prevented, but manufacturing complexity increases
Solution Approach 1:
The patent applies parameter changes by systematically varying the elastic modulus parameter of conductive materials across different wiring layers. This controlled parameter variation allows the PCB to achieve warpage prevention through material property gradients rather than complex structural designs, thereby managing manufacturing complexity while achieving the desired stability.
3Reliability
If multiple wiring layers with varying elastic moduli are created, then thermal expansion compensation is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent implements local quality by assigning different elastic modulus values to conductive materials in specific wiring layers based on their position relative to the semiconductor chip. This localized material property optimization provides effective thermal expansion compensation where it is most needed, while maintaining simpler material specifications for outer layers, thus balancing reliability improvement with manufacturing feasibility.
Solution Approach 2:
The patent utilizes parameter changes by systematically adjusting the elastic modulus of conductive materials across the wiring layer stack. This controlled parameter variation enables effective thermal expansion compensation through material property gradients, achieving improved reliability while managing manufacturing process complexity through systematic rather than arbitrary material selection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively mitigates warpage in semiconductor packages by providing the necessary stiffness to counteract thermal expansion mismatches, enhancing the reliability of the packages even at reduced thicknesses.
Implementation Method 1
an elastic modulus of a conductive material of one wiring pattern from among the plurality of wiring layers being less than an elastic modulus of a conductive material of another wiring pattern from among the plurality of wiring layers
Implementation Method 2
preventing warpage due to thermal expansion coefficient mismatches between semiconductor chips and printed circuit boards
Data Source
AI summary
A printed circuit board (PCB) reducing a thickness of a semiconductor package and improving reliability of the semiconductor package, a semiconductor package including the PCB, and a method of manufacturing the PCB may be provided. The PCB may include a substrate base having at least one base layer, and a plurality of wiring layers disposed on a top surface and a bottom surface of the at least one base layer, the plurality of wiring layers defining a plurality of wiring patterns, respectively may be provided. An elastic modulus of a conductive material of one wiring pattern of at least one wiring layer from among the plurality of wiring layers may be less than a conductive material of another wiring pattern.


