Power and Clock Control Module Standby Management

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Solution Overview

Problem

Current power management techniques in electronic devices are difficult to design and verify, leading to unpredictable and unstable operation, and do not effectively reduce power consumption in a simple and reliable manner.

Innovation Solution

A power and clock control module (PCCM) is introduced to manage the initiation of a standby mode in electronic devices by coupling with an initiator module, using standby and wait signals to limit or remove power and clock signals, allowing for reduced power consumption while preventing edge condition errors through controlled signal activation and deactivation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If current power management techniques are used to reduce power consumption, then power consumption decreases, but the system becomes difficult to design and verify, leading to unpredictable and unstable operation

Engineering Contradiction:
Improvepower consumptionVSAvoidoperation stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

A dedicated power management module is introduced as an intermediary component that sits between the processor and power sources. This module independently manages power distribution to various components, simplifying the overall system design while ensuring stable and predictable power control, thereby resolving the contradiction between power reduction and operational reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If power management techniques are implemented to reduce power consumption, then energy efficiency improves, but the design and verification complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddesign and verification complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The power management functionality is segmented into a dedicated standalone module rather than being distributed throughout the system. This segmentation consolidates the complexity into a single verifiable unit, making the overall system easier to design and verify while maintaining effective power consumption reduction capabilities

Inventive Principle:
Principle #1Segmentation

3Use of energy by moving object

If clock signals are stopped to reduce power consumption, then power usage decreases, but the system may experience unpredictable operation

Engineering Contradiction:
Improvepower consumptionVSAvoidoperation predictability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The power management module implements feedback mechanisms that continuously monitor system state and component activity levels. Based on this feedback, the module intelligently controls clock signal distribution, stopping clocks to inactive components to reduce power while maintaining predictable and stable operation through coordinated control

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7809961B2Standby mode for power management
Publication Date: 2010.10.05 TEXAS INSTRUMENTS INC
  • US7809961B2 patent drawing
  • US7809961B2 patent drawing
  • US7809961B2 patent drawing

AI summary

An apparatus and method for controlling standby mode in an electronic device. In standby mode, power and clock signals are reduced or stopped to conserve power. The apparatus includes an initiator module coupled to a power and clock control module (PCCM). When the initiator module meets conditions for standby mode, the initiator module sends a standby signal to the PCCM and does not interact with other initiator, target, or interconnect modules. When the PCCM communicates a wait signal, the initiator module enters standby mode. When the initiator module detects a wakeup event, the standby signal is deactivated. In this state, the initiator module may process information but may not interact with other modules. When the PCCM deactivates the wait signal and returns power and clock signal to steady state levels, initiator module may resume normal operation.