PCG SLAM Back-End Matrix Rearrangement for Faster 6DoF Re-Localization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Simultaneous localization and mapping (SLAM) processes in augmented and virtual reality devices face challenges with high computational demands, leading to long processing times and increased power consumption, especially with low-performance back-end processors, and tethered connections result in data latency and device weight issues.

Innovation Solution

An electronic device equipped with an image database, a factor graph database, and a processor that performs re-localization and calculates six degrees of freedom-related components by constructing and rearranging matrices and vectors, focusing on diagonal elements and transpose elements, and using a shift register for efficient data accumulation and shifting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a high-performance processor is used to accelerate SLAM operations, then processing speed is improved, but power consumption and device size increase

Engineering Contradiction:
ImproveSLAM processing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The processor is divided into multiple processing units that can operate in parallel. Each processing unit handles specific matrix operation tasks independently, allowing the system to achieve high processing speed through parallel computation while keeping individual unit power consumption low. The processor includes multiple multipliers and adders that simultaneously perform different calculation tasks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically adjusts operational parameters such as clock frequency and processing precision based on task requirements. For routine SLAM operations, lower precision and frequency are used to save power, while high-precision rapid processing is activated only when needed, optimizing the balance between speed and power consumption.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If a high-performance processor is used to accelerate SLAM operations, then processing speed is improved, but device size increases

Engineering Contradiction:
ImproveSLAM processing speedVSAvoiddevice size
Core Design Contradiction:
ProductivityVSVolume of moving object

Solution Approach 1:

The processor architecture is segmented into specialized functional units (multipliers, adders, memory controllers) that can be selectively activated. This modular approach allows the device to achieve high processing capability when needed while maintaining a compact form factor, as not all units need to be fully operational simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The processing units are designed to handle multiple types of operations (matrix multiplication, vector operations, data shuffling) within a single integrated structure. This multi-functionality reduces the overall device size compared to having separate dedicated hardware for each operation type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If matrix operations are performed using conventional methods, then implementation is simple, but processing time increases

Engineering Contradiction:
Improveimplementation complexityVSAvoidprocessing time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

Matrix operations are divided into block-wise computations where the matrix is partitioned into smaller sub-matrices. Each processing unit handles specific blocks simultaneously, reducing the overall computation time from O(n³) to approximately O(n³/p) where p is the number of processing units, while maintaining implementation feasibility through systematic block processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Data is pre-organized and stored in optimized memory layouts before processing begins. Vectors and matrices are arranged in formats that minimize memory access time and maximize parallel computation efficiency. This preliminary data preparation significantly reduces processing time without adding complex algorithms during the actual computation phase.

Inventive Principle:
Principle #10Preliminary action

4Measurement precision

If sensor data size and map size are increased to improve accuracy, then SLAM accuracy is improved, but the amount of mathematical operations increases

Engineering Contradiction:
ImproveSLAM accuracyVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

Large sensor datasets and map information are divided into manageable blocks that can be processed in parallel. The processing units independently compute contributions from different data segments, allowing the system to handle large datasets for high accuracy while maintaining processing speed through parallelization. Results from all segments are then aggregated to produce the final accurate SLAM solution.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3995779A1Method of accelerating simultaneous localization and mapping (SLAM) and device using same
Publication Date: 2022.05.11 SAMSUNG ELECTRONICS CO LTD
  • EP3995779A1 patent drawingFigure 1
  • EP3995779A1 patent drawingFigure 2
  • EP3995779A1 patent drawingFigure 3

AI summary

A preconditioned conjugate gradient (PCG) solver, embedded in an electronic device to perform a simultaneous localization and mapping (SLAM) operation, includes an image database, a factor graph database, and a back-end processor, wherein the back-end processor is configured to receive an image from the image database to perform re-localization, receive, from the factor graph database, data for calculating six degrees of freedom (DoF)-related components, construct a matrix including the six degrees of freedom-related components based on the received data, and load and rearrange the matrix and a vector, to perform calculation on each block of each row of the matrix and the vector, then output first data, and shift second data to a location of the first data.