PCI Device Address Mapping via IOMMU Contiguous Space
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Solution Overview
Problem
Conventional IT systems face resource consumption and performance issues due to centralized error handling and double translation in IOMMU implementations, leading to reduced efficiency and limited resources for other applications.
Innovation Solution
A data processing system with a main storage, IOMMU, and PCI device that employs a mapper for contiguous PCI address space mapping, reducing resource consumption and enabling efficient error handling within the PCI device, thereby improving system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If centralized error handling is implemented in the IOMMU, then system-wide error management is achieved, but resource consumption increases and performance decreases
Solution Approach 1:
The patent divides error handling functionality into two segments: local error handling within the PCI device for common errors, and centralized IOMMU error handling for critical system-wide errors. This segmentation allows most errors to be handled locally without impacting overall system performance, while maintaining reliable centralized management for important errors.
Solution Approach 2:
The patent introduces a mapping unit as an intermediary component between the PCI device and IOMMU. This mapping unit handles address translation and local error detection, filtering out many errors before they reach the IOMMU, thus reducing the IOMMU's error handling burden and improving system performance while maintaining reliability.
2Adaptability or versatility
If double translation is implemented (device address to PCI address, then PCI address to physical memory address), then address mapping flexibility is improved, but resource consumption increases
Solution Approach 1:
The patent extracts the address translation functionality from the IOMMU and places it directly in the PCI device's mapping unit. This allows the PCI device to perform device address to PCI address translation locally, eliminating the need for double translation through the IOMMU and reducing resource consumption while maintaining address mapping flexibility.
Solution Approach 2:
The patent changes the dimension of address translation by implementing it at the device level rather than solely at the system level. The mapping unit within the PCI device creates a local address translation layer, transforming the single centralized translation dimension into multiple distributed translation dimensions, thereby reducing resource consumption while preserving flexibility.
3Productivity
If IOMMU is implemented in each PCI device, then translation efficiency is improved, but device complexity increases
Solution Approach 1:
The patent implements a mapping unit within the PCI device that performs multiple functions: address translation from device addresses to PCI addresses, and local error detection. This multi-functional approach improves translation efficiency by eliminating the need for double translation, while the integrated design prevents excessive increase in device complexity by combining functions rather than adding separate components.
Data Source
AI summary
A data processing system includes a main storage, an input/output memory management unit (IOMMU) coupled to the main storage, a peripheral component interconnect (PCI) device coupled to the IOMMU, and a mapper. The system is configured to allocate an amount of physical memory in the main storage and the IOMMU is configured to provide access to the main storage and to map a PCI address from the PCI device to a physical memory address within the main storage. The mapper is configured to perform a mapping between the allocated amount of physical memory of the main storage and a contiguous PCI address space. The IOMMU is further configured to translate PCI addresses of the contiguous PCI address space to the physical memory address within the main storage.