PCI-Compatible SoC Interconnect via Transactional Layering

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Solution Overview

Problem

Semiconductor architectures like AXI and OCP-based systems lack PCI compatibility due to missing features such as fixed addresses, lack of plug-and-play mechanisms, and inadequate power management, limiting their reuse in PC-compatible systems.

Innovation Solution

Implementing a transaction-level modular interconnect that separates the transactional level from the physical level, using thin hardware blocks like Yunit and shim to map PCI transactions to a point-to-point interconnect system, and incorporating PCI functionality into existing SoC components, enabling PC compatibility without modifying IP resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a transactional-level interface is used for IP components in external non-PC-compatible systems, then component reuse and rapid development are enabled, but PCI compatibility is lost due to missing features

Engineering Contradiction:

Improverapid developmentVSAvoidPCI compatibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a PCI compatibility layer as an intermediary between the transactional-level AXI/OCP interface and the PCI interface. This layer includes components such as a configuration space interface, interrupt controller, and power management interface that translate between the two protocols, enabling PCI compatibility without modifying the core IP components.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the system into distinct functional layers: the transactional-level interface layer (AXI/OCP), the PCI compatibility layer (with configuration space, interrupts, power management), and the physical PCI interface layer. This segmentation allows each layer to be independently designed and optimized while maintaining overall system compatibility.

Inventive Principle:

Principle #1Segmentation

2Reliability

If interconnect specifications mix transactional level with physical level for external devices, then complete device control is achieved, but component reuse is limited when silicon processes change

Engineering Contradiction:

Improvedevice controlVSAvoidcomponent reuse

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent separates the interface specification into two distinct levels: the transactional level (defining data transfer, addressing, and control signals) and the physical level (defining electrical characteristics, timing, and pin assignments). This separation allows the transactional-level IP components to be reused across different silicon processes while only the physical layer needs to be adapted.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces an abstraction dimension by creating a transactional-level interface that operates independently of physical implementation details. This allows IP components to be instantiated at the transactional level and then mapped to different physical implementations depending on the silicon process and device requirements.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If AXI/OCP IP blocks are used in SoC systems, then modular design and rapid proliferation are enabled, but PC system compatibility is lost

Engineering Contradiction:

Improvemodular designVSAvoidPC system compatibility

Core Design Contradiction:

Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent introduces a PCI compatibility layer as an intermediary between the modular AXI/OCP IP blocks and the PC system requirements. This layer provides the missing PCI features including configuration space access, interrupt handling, and power management, enabling modular IP blocks to function in PC-compatible systems without sacrificing their modular design advantages.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Adaptability or versatility

If PCI-style features are added to AXI/OCP interfaces, then PC compatibility is achieved, but interface complexity increases

Engineering Contradiction:

ImprovePC compatibilityVSAvoidinterface complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the PCI compatibility features into separate functional modules: configuration space interface, interrupt controller, and power management interface. Each module handles a specific aspect of PCI compatibility, allowing the core AXI/OCP interface to remain simple while adding PCI functionality only where needed through modular additions.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9547618B2Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)

Publication Date: 2017.01.17 TAHOE RES LTD

AI summary

In one embodiment, the present invention includes an apparatus having an adapter to communicate according to a personal computer (PC) protocol and a second protocol. A first interface coupled to the adapter is to perform address translation and ordering of transactions received from upstream of the adapter. The first interface is coupled in turn via one or more physical units to heterogeneous resources, each of which includes an intellectual property (IP) core and a shim, where the shim is to implement a header of the PC protocol for the IP core to enable its incorporation into the apparatus without modification. Other embodiments are described and claimed.