PCIe Error Interrupt Masking and Counting for Load Reduction

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Solution Overview

Problem

The existing error processing systems in PCIe environments face challenges in managing high volumes of error messages, leading to increased processing loads and interference with other processes, as they struggle to efficiently handle frequent errors and set appropriate thresholds for interrupt notifications.

Innovation Solution

An information processing device with a control device that receives error messages, determines if an interrupt mask is set, and if not, inhibits the transmission of interrupts to the processor, while using counter circuits to count error messages and transmit their values to the processor upon instruction, allowing for controlled interrupt generation and reduced processing loads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the error processing unit processes error messages one by one, then accurate error handling is achieved, but the processing load increases and other processes are affected

Engineering Contradiction:
Improveerror handling accuracyVSAvoidprocessing load
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by setting up interrupt masks before error messages arrive. When an error message is received, the interrupt mask is checked before generating an interrupt, preventing the processing unit from being overwhelmed. This preparatory measure ensures that even though error messages are received continuously, the system can handle them accurately without excessive processing load by controlling interrupt generation in advance.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If the threshold for interrupt notification is set low, then error detection responsiveness is improved, but the number of interrupts increases and processing load increases

Engineering Contradiction:
Improveerror detection responsivenessVSAvoidprocessing load
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the interrupt mask state based on error message characteristics. Instead of using a fixed low threshold that generates excessive interrupts, the system changes the parameter of interrupt generation by checking the interrupt mask before notifying the processing unit. This allows responsive error detection when needed while preventing unnecessary interrupts that would increase processing load.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If the interrupt mask is always set to inhibit interrupts, then processing load is reduced, but error detection responsiveness deteriorates

Engineering Contradiction:
Improveprocessing loadVSAvoiderror detection responsiveness
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the interrupt mask state changeable rather than fixed. The interrupt mask can be set or cleared based on system conditions, allowing the system to switch between inhibiting interrupts (to reduce processing load) and allowing interrupts (to improve error detection responsiveness). This dynamic adjustment resolves the contradiction by adapting the interrupt mask state to current system needs.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10019301B2Information processing device, and control method and storage medium
Publication Date: 2018.07.10 FUJITSU LTD
  • US10019301B2 patent drawing
  • US10019301B2 patent drawing
  • US10019301B2 patent drawing

AI summary

An information processing device includes a processor; and a control device coupled to the processor and configured to receive a packet, determine whether a mask for an interrupt is set, when the received packet is an error message for notifying occurrence of an error in communication between the processor and any of one or more other devices, transmit the interrupt to the processor, when determining that the mask for the interrupt is not set, inhibit transmitting of the interrupt to the processor, when determining that the mask for the interrupt is set; and one or more counter circuits respectively configured to count a number of the error message received while the mask for the interrupt is set, and transmit a value of the number of the error message to the processor in accordance with an instruction from the processor.