PCI-E Memory Space Mapping for Packet Forwarding

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Solution Overview

Problem

Existing network devices face challenges in improving forwarding performance between interface boards and reducing CPU occupancy in forwarding boards when using the PCI-E bus for interconnection.

Innovation Solution

The solution involves mapping PCI-E memory spaces between interface boards and the forwarding board, allowing for direct packet forwarding without CPU intervention by encapsulating Ethernet data packets into PCI-E packets with specific memory space addresses, enabling the PCI-E Endpoint to forward them directly to the destination board memory, and maintaining mapping tables to determine destination boards based on MAC addresses and IDs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If packet forwarding between interface boards is performed through the forwarding board's CPU, then packet forwarding can be completed with simple architecture, but forwarding performance is limited and CPU occupancy increases

Engineering Contradiction:
Improvepacket forwarding performanceVSAvoidforwarding board architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces PCI-E memory space as an intermediary mechanism between interface boards. Instead of direct CPU-mediated forwarding, packets are encapsulated into PCI-E packets and transmitted through mapped memory spaces, enabling high-speed direct forwarding while reducing CPU involvement.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical CPU processing path with an automated PCI-E memory space mapping system. The forwarding decision is offloaded to hardware-based memory mapping mechanisms, substituting software-based CPU processing with hardware-based direct memory access.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If PCI-E memory space mapping is implemented for direct packet forwarding, then forwarding performance improves and CPU occupancy reduces, but system complexity increases

Engineering Contradiction:
Improvepacket forwarding performanceVSAvoidmemory space mapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the PCI-E memory space into distinct regions for different interface boards. Each interface board is assigned specific memory address ranges, allowing independent packet forwarding without interference. This segmentation simplifies the mapping complexity by creating clear, non-overlapping memory regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary memory space mapping configuration during system initialization. The PCI-E memory spaces of all interface boards are pre-mapped to the forwarding board's memory address space before packet forwarding begins, eliminating the need for runtime mapping decisions and reducing operational complexity.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If CPU is involved in packet forwarding process, then packet forwarding can be completed with simple control logic, but CPU occupancy rate increases

Engineering Contradiction:
Improvecontrol logic simplicityVSAvoidCPU occupancy rate
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent enables the PCI-E memory space mapping system to serve itself automatically. Packet forwarding decisions are made by hardware-based memory address translation mechanisms rather than CPU software logic. The system self-manages packet routing through pre-configured memory mappings, eliminating CPU involvement in the forwarding path.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3370377B1Packet forwarding
Publication Date: 2019.11.27 NEW H3C TECH CO LTD
  • EP3370377B1 patent drawingFigure 1
  • EP3370377B1 patent drawingFigure 2
  • EP3370377B1 patent drawingFigure 3a

AI summary

When a first interface board receives from an Ethernet switch chip a first Ethernet data packet, once a destination board of the first Ethernet data packet is determined as a second interface board, a logical device of the first interface board encapsulates the first Ethernet data packet into a first PCI-E packet that takes a PCI-E memory space address of a board memory in the second interface board as a destination address, so as to enable a PCI-E Endpoint to forward the first PCI-E packet to a forwarding board of a network device; when the first interface board obtains from a board memory a second PCI-E packet coming from a third interface board, logical device of the first interface board parses out a second Ethernet data packet from the second PCI-E packet, and transmits the second Ethernet data packet to the Ethernet switch chip, the third interface board and the second interface board being the same or not same.