PCI-E Switch Resource Allocation Bypass
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In server computers, the fixed allocation of resources to PCI-E slots during initialization limits the ability to accommodate PCI-E cards requiring higher bandwidth, and the use of a PCI-E switch can introduce performance lag due to its complex circuitry, especially when only a single slot is used.
Innovation Solution
A system and method that allows direct allocation of processor host bridge resources to a single PCI-E slot, bypassing the PCI-E switch, using simple circuit switches to enhance communication efficiency and support higher resource requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a PCI-E switch is used to interconnect PCI-E slots with the processor, then multiple PCI-E slots can be supported, but performance lag is introduced due to complex circuitry
Solution Approach 1:
The system segments the connection path by introducing simple circuit switches between the PCI-E switch and processor, creating multiple hierarchical levels. This allows the complex PCI-E switch to handle slot multiplexing while simple switches provide direct, low-latency paths to the processor, resolving the contradiction between supporting multiple slots and maintaining high speed.
Solution Approach 2:
Simple circuit switches are introduced as intermediary components between the PCI-E switch and the processor. These intermediaries provide direct communication paths that bypass the complex circuitry of the PCI-E switch, thereby maintaining high communication speed while still supporting multiple PCI-E slots through the PCI-E switch's slot management capabilities.
2Stability of the object's composition
If resources are fixed at initialization for each PCI-E slot, then system stability is ensured, but the ability to accommodate PCI-E cards requiring higher bandwidth is limited
Solution Approach 1:
The system implements dynamic resource allocation by allowing the hypervisor to reconfigure and reallocate PCI-E resources after initialization. The simple circuit switches enable dynamic path selection and resource assignment, allowing resources to be adjusted based on the specific requirements of inserted PCI-E cards while maintaining system stability through controlled reconfiguration.
Solution Approach 2:
The system changes resource allocation parameters dynamically by allowing the hypervisor to modify bandwidth assignments, memory mappings, and I/O resources based on the detected PCI-E card requirements. This enables the system to adapt from fixed initialization allocation to flexible runtime allocation, accommodating high bandwidth cards while maintaining overall system stability.
3Device complexity
If simple circuit switches are used instead of a PCI-E switch, then device complexity is reduced, but the ability to manage multiple PCI-E slots is lost
Solution Approach 1:
The system segments the switching functionality into two layers: a PCI-E switch that handles slot management and multiplexing, and simple circuit switches that handle direct processor connectivity. This segmentation allows each component to specialize in its function, reducing overall complexity while maintaining the ability to manage multiple slots.
Solution Approach 2:
The system merges the functionalities of the PCI-E switch and simple circuit switches into a unified architecture. The PCI-E switch manages slot assignments and card detection, while the simple circuit switches provide direct processor access, together achieving both slot management capability and reduced complexity for the critical communication path.
Data Source
AI summary
According to an embodiment, a system, a method, and/or a computer program product is provided to allow a choice of allocating resources of a processor host bridge (PHB) at initial setup of a computer system to a group of peripheral component interconnect express (PCI-E) slots via a PCI-E switch, or alternatively to allocate resources of the PHB directly to a single PCI-E slot. The system may include a PHB, a first switch connected to the PHB, where the first switch is a simple circuit, a second switch connected to the first switch, where the second switch is a simple circuit, a PCI-E switch connected to the first switch and connected to the second switch, and a first PCI-E slot connected to the second switch.


