PCI Expansion ROM Microcode Caching in BIOS

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The lengthy boot time of computer systems with multiple PCI devices is due to the need for the BIOS to probe and initialize each expansion ROM, increasing production costs and reducing space on PCI plug-in cards.

Innovation Solution

Caching PCI device expansion ROM microcode in BIOS memory, allowing the system to configure and enable PCI devices without needing to probe each expansion ROM individually, thereby reducing the number of ROMs required on PCI plug-in cards.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If each PCI device includes an expansion ROM on the PCI plug-in card, then the device can function properly, but the number of ROMs increases production costs and reduces space on the card

Engineering Contradiction:

ImprovePCI device functionalityVSAvoidproduction costs

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The BIOS memory is used for multiple purposes: storing system boot instructions and caching PCI device expansion ROM microcode. This allows the same memory resource to serve dual functions, eliminating the need for separate expansion ROMs on each PCI device while maintaining device functionality.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system creates a copy of the expansion ROM microcode and stores it in the BIOS memory during system initialization. This copied microcode is then used to enable PCI devices without requiring the original expansion ROM chips on the plug-in cards, thereby reducing component count and production costs.

Inventive Principle:

Principle #26Copying

2Reliability

If each PCI device includes an expansion ROM on the PCI plug-in card, then the device can function properly, but the space available on the PCI plug-in card is reduced

Engineering Contradiction:

ImprovePCI device functionalityVSAvoidspace on PCI plug-in card

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The expansion ROM microcode is extracted from the physical expansion ROM chips on the PCI plug-in card and transferred to the BIOS memory during system boot. This extraction eliminates the need for expansion ROM components on the plug-in cards, freeing up physical space while preserving device functionality through the cached microcode.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The system moves the storage of expansion ROM microcode from the spatial dimension (physical ROM chips on the PCI card) to the temporal dimension (caching in BIOS memory during boot sequence). This allows the microcode to be available when needed without occupying physical space on the plug-in card.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Ease of operation

If the BIOS probes and initializes each expansion ROM for PCI devices, then the devices can be configured, but the boot time increases to several minutes

Engineering Contradiction:

ImprovePCI device configurationVSAvoidboot time

Core Design Contradiction:

Ease of operationVSLoss of time

Solution Approach 1:

The system performs preliminary actions during system initialization by caching all necessary expansion ROM microcode in BIOS memory before actual PCI device operation is required. This preliminary caching eliminates the need for time-consuming probing and initialization of expansion ROMs during device operation, significantly reducing boot time.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The BIOS skips the traditional time-consuming process of probing each expansion ROM individually by using the pre-cached microcode in BIOS memory. This allows the system to rush through the PCI device configuration process much faster, reducing boot time from several minutes to a fraction of that time.

Inventive Principle:

Principle #21Skipping (Rushing through)

Data Source

PatentUS7549040B2Method and system for caching peripheral component interconnect device expansion read only memory data

Publication Date: 2009.06.16 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A system for caching peripheral component interconnect device data. In response to probing a peripheral component interconnect device, peripheral component interconnect device data is discovered. The discovered peripheral component interconnect device data is cached and then configured to enable the peripheral component interconnect device to execute.