LLI Interconnect Protocol Enumeration via PCIe Translation
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Solution Overview
Problem
The Low Latency Interface (LLI) specification lacks a sufficient mechanism for enumerating and configuring devices attached to LLI links, which limits its functionality and interoperability with other interconnect protocols.
Innovation Solution
The proposed solution leverages the enumeration and configuration mechanisms of existing interconnect protocols like PCI, PCIe, or PCI-X to enable device enumeration and configuration over LLI links, using conversion logic to translate transactions between these protocols, thereby extending the capabilities of LLI without the need for new mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If LLI protocol is used for low latency communication, then speed is improved, but device enumeration and configuration capability deteriorates
Solution Approach 1:
The LLI interface is enhanced to support multiple functions: it maintains its native low-latency communication capability while simultaneously supporting device enumeration and configuration through PCIe protocol translation. The conversion logic layer enables the same physical interface to handle both LLI packets and PCIe configuration transactions, making the system universal and multi-functional without requiring separate dedicated interfaces for each protocol type.
Solution Approach 2:
Conversion logic is introduced as an intermediary layer between the LLI protocol and PCIe enumeration/configuration protocols. This mediator translates PCIe configuration transactions into LLI-compatible packets and vice versa, enabling devices attached to LLI links to be properly enumerated and configured without compromising the low-latency performance of native LLI communication. The intermediary handles protocol translation transparently, allowing both functions to coexist.
2Adaptability or versatility
If new enumeration mechanism is developed for LLI, then adaptability is improved, but device complexity and development cost increases
Solution Approach 1:
Instead of developing a completely new enumeration mechanism for LLI, the solution copies and leverages the proven PCIe enumeration and configuration mechanisms. The conversion logic translates PCIe's well-developed enumeration protocols into LLI-compatible form, allowing LLI to benefit from PCIe's mature device discovery and configuration capabilities without having to reinvent the wheel. This copying approach reduces complexity while maintaining adaptability.
Solution Approach 2:
The conversion logic serves multiple purposes: it enables device enumeration, supports configuration transactions, and maintains backward compatibility with existing LLI communication. By making the conversion layer universal and multi-functional, the system avoids the need for separate specialized mechanisms for each function, thereby reducing overall device complexity while achieving full adaptability.
3Adaptability or versatility
If protocol conversion logic is added, then interoperability is improved, but processing overhead increases
Solution Approach 1:
The conversion logic is designed to perform translations in advance where possible and to use pre-established translation mappings between LLI and PCIe protocols. By preparing conversion rules and translation tables beforehand, the system minimizes real-time processing overhead during actual data transmission. Common transaction patterns are pre-configured to reduce the computational burden during runtime conversions.
Solution Approach 2:
The conversion logic applies different translation strategies based on the specific transaction type and protocol requirements. Rather than using a uniform conversion approach for all transactions, the system optimizes conversion methods locally for each protocol interaction scenario, reducing unnecessary processing overhead while maintaining accurate interoperability. This localized optimization ensures that only the necessary translations are performed with appropriate detail levels.
Data Source
AI summary
An interconnect architecture device of an aspect includes a processor to generate a transaction that is of a different interconnect protocol than LLI. The interconnect architecture device also includes conversion logic coupled with the processor. The conversion logic is to convert the transaction, which is of the different interconnect protocol than LLI, to an LLI packet. The interconnect architecture device also includes an LLI controller coupled with the conversion logic. The LLI controller is to couple the interconnect architecture device with an LLI link. The LLI controller is to transmit the LLI packet on the LLI link.


