PCI-to-OCP Bridge for ARM IP Integration
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Solution Overview
Problem
The integration of ARM-based IPs with PCI-based interconnects in computer systems is hindered by differences in transaction ordering rules and interconnect topologies, leading to data coherency issues due to the distinct characteristics of PCI/PCIe and ARM-based interconnects.
Innovation Solution
A PCI-to-OCP/AHB bridge is employed, which includes buffers for transaction flow and mechanisms to convert posted memory writes to non-posted writes, ensuring data coherency by serializing writes and read returns, and maintaining strict ordering rules, thereby facilitating communication between PCI-based and OCP/AHB-based fabrics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If PCI-based interconnect is used to attach ARM-based devices, then legacy PCI device compatibility is maintained, but data coherency issues arise due to different transaction ordering rules
Solution Approach 1:
A bridge device is introduced as an intermediary component between the PCI-based interconnect and ARM-based devices. This bridge translates and adapts transactions between the two different interconnect protocols, allowing PCI-based systems to communicate with ARM-based devices while maintaining data coherency through proper transaction ordering and protocol conversion.
2Reliability
If ARM-based interconnect (OCP/AHB) is used, then data coherency is maintained through separate write and read return data buses, but integration with PCI-based fabrics becomes difficult
Solution Approach 1:
The bridge device serves as a mediator that translates ARM-based OCP/AHB transactions into PCI-based transactions and vice versa. It maintains the separate write and read return data bus architecture of ARM-based systems while integrating with the shared bus architecture of PCI-based systems, enabling seamless communication between the two different interconnect topologies.
3Productivity
If posted transactions are used in PCI-based interconnect, then performance is improved, but transaction ordering rules become complex to manage coherency
Solution Approach 1:
The bridge device manages the complexity of transaction ordering by implementing a translation layer between posted transactions (PCI-based) and non-posted transactions (ARM-based). It automatically handles the ordering rules and coherency protocols, allowing the high-performance posted transaction mechanism to be used in PCI-based systems while maintaining simplicity in ARM-based systems.
Data Source
AI summary
Methods and apparatus for integrating ARM-based IPs in computer system employing PCI-based fabrics. An PCI-based fabric is operatively coupled to an ARM-based ecosystem employing an ARM-based fabric such as OCP, AHB, or BVCI via a corresponding fabric-to-fabric bridge. Transactions between IP operatively coupled to the PCI-based fabric and IP in the ARM-based ecosystem are facilitated by applying applicable ordering and conversions operations via the fabric-to-fabric bridge and/or fabrics. For example, posted writes originating from IP coupled to the PCI-based fabric are converted to non-posted writes and serialized via the fabric-to-fabric bridge and forwarded to the ARM-based ecosystem.