PCI Reset Signal Generator for High-Speed Interface Recovery
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Solution Overview
Problem
High-speed PCI devices often fail to reset properly, leading to system crashes or inability to awaken from hibernate mode, requiring a time-consuming power cycle for recovery.
Innovation Solution
A high-speed PCI interface system with a reset signal generator that generates a basic resetting signal to execute a basic resetting action on the high-speed PCI device, allowing for system initialization without power cycling, using a host controller chipset, root ports, and reset signal generators to transmit signals through PCI and trigger lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the system uses hot reset packet transmission through high-speed PCI bus, then the reset function can be implemented, but the high-speed PCI device may not be able to execute the hot reset packet properly
Solution Approach 1:
A reset signal generator is introduced as an intermediary component between the root port and the high-speed PCI device. This generator receives the hot reset packet, processes it, and generates a basic resetting signal that is guaranteed to be executed by the device, ensuring reliable reset function without depending on the device's ability to execute complex hot reset packets.
Solution Approach 2:
The patent extracts the essential reset function from the complex hot reset packet transmission mechanism. By separating the reset signal generation from the high-speed PCI bus communication, the system ensures that the reset function is independent of the device's execution capability, thereby improving reliability.
2Reliability
If the system crashes or device fails to awaken from hibernate mode, then the system requires power cycling for recovery, but this costs a lot of time
Solution Approach 1:
The reset signal generator is pre-configured in the system and ready to activate immediately when a crash or hibernate failure occurs. This preliminary preparation eliminates the need for time-consuming power cycling, as the reset function can be triggered instantly through the pre-established reset signal line.
Solution Approach 2:
The patent replaces the mechanical power cycling process with an electrical signal-based reset mechanism. Instead of physically powering on and off the system, the reset signal generator sends an electrical reset signal through the reset signal line, achieving the same recovery effect much faster.
3Speed
If the system adopts high-speed PCI device with PCI Express interface, then transmission speed and bandwidth are improved, but the complexity of reset mechanism increases
Solution Approach 1:
The reset mechanism is segmented into independent functional blocks: the root port that generates the hot reset packet, the reset signal generator that processes the packet, and the basic resetting signal that is sent to the device. This segmentation simplifies the overall complexity by making each component's function clear and independent.
Solution Approach 2:
The reset signal generator serves multiple functions: it receives hot reset packets from the root port, processes these packets, generates basic resetting signals, and sends them to the high-speed PCI device. This multi-functionality reduces the need for separate dedicated reset circuitry, thereby simplifying the overall mechanism.
Data Source
AI summary
A high-speed PCI interface system with reset function and a reset method thereof are provided. The interface system comprises a host controller chipset, at least one high-speed PCI device and at least one reset signal generator. While a hot reset packet cannot be executed by the high-speed PCI device, the host controller chipset can respectively transmit a trigger signal and a PCI reset signal to each corresponding reset signal generator through a trigger signal line and a PCI reset signal line, and further the reset signal generator operates to generate a basic resetting signal. Finally, the basic resetting signal will be transmitted to the corresponding high-speed PCI device through a basic reset signal line such that the system can be used to operate the basic resetting action without restarting power.