PCIe Accelerator DDR Data Transfer with Pre-Allocated Memory
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Solution Overview
Problem
Existing communication methods between a host and PCIE accelerator cards, as well as between PCIE accelerator cards, are inefficient and do not effectively utilize the processing capabilities of double data rate synchronous dynamic random access memory (DDR SDRAM) for data transfer and management.
Innovation Solution
A communication method and apparatus that utilizes a target interface to move data into a pre-allocated storage area in a DDR SDRAM of a target storage area pre-allocated storage area in a target storage area on a DDR SDRAM of a target accelerator card, and a target accelerator card, and a target interface to send a notification to a data receiving device, where the target storage area is pre-allocated on a DDR SDRAM of a PCIE accelerator card, allowing for efficient data transfer and management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional ring buffer communication is used between host and PCIE accelerator cards, then communication functionality is achieved, but communication efficiency and data transfer speed are insufficient
Solution Approach 1:
The patent pre-allocates storage areas in the DDR SDRAM of PCIE accelerator cards before communication begins. This preliminary preparation eliminates the need for dynamic memory allocation during data transfer, significantly reducing transfer time and improving communication efficiency between the host and accelerator cards.
Solution Approach 2:
The patent replaces the traditional ring buffer mechanism with a direct memory access system utilizing DDR SDRAM. This substitution eliminates the intermediate buffering stage and enables faster data transfer by directly accessing memory resources, thereby resolving the efficiency bottleneck in traditional communication methods.
2Adaptability or versatility
If multiple PCIE accelerator cards are deployed to enhance processing capacity, then system functionality is improved, but communication complexity and management difficulty increase
Solution Approach 1:
The patent implements a universal communication interface and pre-allocated storage area mechanism that works consistently across multiple PCIE accelerator cards. This standardized approach allows the host to communicate with any accelerator card using the same procedure, simplifying management despite having multiple devices deployed.
Solution Approach 2:
The patent divides the communication system into distinct functional segments: the host, the PCIE accelerator cards with pre-allocated storage areas, and the communication interface. This segmentation allows each component to operate independently with well-defined roles, reducing overall system complexity while supporting multiple accelerator cards.
3Speed
If data is transferred through traditional protocols without pre-allocated storage, then compatibility is maintained, but data transfer speed and processing capability utilization are limited
Solution Approach 1:
The patent pre-allocates storage areas in DDR SDRAM before data transfer begins. This preliminary action prepares the destination memory in advance, eliminating delays associated with dynamic allocation and enabling faster data transfer speeds while maintaining manageable complexity through structured allocation protocols.
Data Source
AI summary
An example method disclosed herein includes, in response to determining that there is data to be sent, calling a target interface to move the data into a target storage area pre-allocated on a double data rate synchronous dynamic random access memory of a target PCIE accelerator card. The data is data sent into a TCPI/IP protocol stack by a target application by calling a Socket interface function, and the target interface is used for realizing communication between the protocol stack and the target PCIE accelerator card. The method includes calling the target interface to send a notification to a data receiving device. The notification is used for representing that the data to be sent has been stored in the target storage area. A host and the target PCIE accelerator cards can be on an IP network, thereby realizing communication between the host and the target PCIE accelerator cards.