PCIe Address Mapping for Scalable External NVMe Storage

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Solution Overview

Problem

The resources of the PCIe BUS are insufficient to support a large number of external storage devices, leading to inefficiencies and higher protocol conversion overhead when expanding PCIe resources.

Innovation Solution

A storage system with multiple PCIe switches and ports that map PCIe requests across different address spaces, allowing flexible expansion of external storage devices without increasing protocol conversion overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If PCIe resources are expanded to support more external storage devices, then the number of supported devices increases, but protocol conversion overhead increases and system complexity increases

Engineering Contradiction:
Improvenumber of supported external storage devicesVSAvoidprotocol conversion complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent introduces a PCIe switch as an intermediary device between the CPU and multiple external storage devices. The PCIe switch receives PCIe requests from the CPU and performs address space mapping to route requests to the appropriate storage devices, eliminating the need for protocol conversion and reducing system complexity while supporting multiple devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a two-level address space mapping mechanism: the first PCIe switch maps PCIe request addresses from the CPU's address space to a first address space, and the second PCIe switch maps from the first address space to the second address space of external storage devices. This dimensional address space transformation enables multi-device support without protocol conversion overhead.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If PCIe resources are expanded using NVMe to Ethernet chip and Ethernet protocol, then more NVMe disks can be connected, but protocol conversion overhead increases significantly

Engineering Contradiction:
Improvenumber of NVMe disksVSAvoidprotocol conversion overhead
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent uses PCIe switches as intermediary devices that maintain the native PCIe protocol throughout the data path. The switches perform address translation and request routing without requiring protocol conversion to Ethernet, thereby connecting multiple NVMe disks while avoiding the high protocol conversion overhead associated with Ethernet-based solutions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250390219A1Storage system, method and apparatus for processing data, non-transitory storage medium, and electronic device
Publication Date: 2025.12.25 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US20250390219A1 patent drawing
  • US20250390219A1 patent drawing
  • US20250390219A1 patent drawing

AI summary

Disclosed are a storage system, a method and apparatus for processing data, a non-transitory storage medium, and an electronic device. The system includes: a first storage domain (10) including a central processing unit, a first peripheral component interconnect express (PCIe) switch and a first port, where the first PCIe switch maps a PCIe request transmitted by the central processing unit from a first address space of the first port to a second address space of a second port; and a second storage domain (20) including a second PCIe switch, the second port and a plurality of first external storage devices, where the second PCIe switch is configured to map the PCIe request from the second address space to a first target external storage device, and the plurality of first external storage devices include the first target external storage device.