PCIe Audio Stream Timing Synchronization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current Peripheral Component Interconnect Express (PCIe) buses are not optimized for audio signals, leading to high power consumption when streaming low-bandwidth audio data continuously and potential delays or gaps in audio transmission, which degrade audio quality in mobile devices.
Innovation Solution
The solution involves calculating an uplink timing requirement and adjusting the margin time before encoding audio data, synchronizing the clock of the application processor with the modem, and using a high-speed point-to-point serial bus interface to minimize discontinuities in audio data transmission, thereby improving audio quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If audio data is streamed continuously over PCIE bus, then audio quality is maintained, but power consumption increases
Solution Approach 1:
The patent implements periodic action by transmitting audio data in scheduled bursts rather than continuous streams. The system uses timing requirements calculation to determine optimal burst intervals, allowing the PCIE link to enter low-power states between transmissions while maintaining audio quality through proper buffering and timing synchronization.
2Use of energy by moving object
If audio data is sent in bursts to save power, then power consumption is reduced, but transmission delays and audio gaps occur
Solution Approach 1:
The patent applies preliminary action by pre-calculating timing requirements and adjusting margin time before audio data transmission. The system determines the time needed for audio processing and transmission in advance, buffers data appropriately, and schedules burst transmissions to ensure continuous audio playback without gaps or delays.
Solution Approach 2:
The patent implements feedback mechanisms by monitoring audio transmission timing and adjusting burst scheduling dynamically. The system tracks timing requirements and uses this feedback to optimize burst intervals and margin time adjustments, ensuring audio continuity while maintaining power savings.
3Productivity
If clock synchronization is implemented between application processor and modem, then audio stream timing is optimized, but system complexity increases
Solution Approach 1:
The patent uses an intermediary approach by introducing a dedicated timing synchronization mechanism between the application processor and modem. This intermediary timing layer manages clock synchronization and margin time adjustments, simplifying the overall system architecture while optimizing audio stream handling through coordinated timing.
Data Source
AI summary
Systems and methods for providing audio streams over peripheral component interconnect (PCI) express (PCIE) links are disclosed. In particular, exemplary aspects of the present disclosure are used to calculate an uplink timing requirement and adjust a margin time before a modem encodes audio data so that the encoding is done before data is transmitted to an external network. Further aspects of the present disclosure allow a first integrated circuit (IC) to synchronize its clock with that of the modem.