PCIe BAR Remapping for Packet Routing Reliability
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Solution Overview
Problem
PCIe devices face issues with packet routing and corruption when the host system abruptly changes Base Address Registers (BARs), leading to misalignment of memory mappings and potential data loss or overwrite.
Innovation Solution
A PCIe device with a processor that maps addresses to BARs, detects reconfigurations by the host system, marks existing packets as 'old' and new packets as 'new', processes old packets first, and remaps BARs after all old packets are processed, ensuring correct routing and preventing data overwrite.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the host system abruptly changes BARs in the attached PCIe device, then memory allocation flexibility is improved, but packet routing reliability deteriorates
Solution Approach 1:
The patent applies preliminary action by detecting BAR reconfiguration events before they complete and marking packets as 'old' in advance. The processor monitors for reconfiguration requests, marks packets received before the reconfiguration completes as 'old' packets, and ensures these are processed before any remapping occurs. This prevents packet corruption by proactively identifying packets that may be affected by upcoming BAR changes.
Solution Approach 2:
The patent implements dynamics by introducing dynamic packet marking and dynamic remapping timing. Packets are dynamically marked as 'old' or 'new' based on their reception timing relative to BAR reconfiguration events. The remapping operation is dynamically timed to occur only after all 'old' packets have been processed, creating a flexible system that adapts its behavior based on real-time packet flow conditions.
2Productivity
If BARs are remapped immediately upon host system reconfiguration, then memory mapping efficiency is improved, but packet processing correctness deteriorates
Solution Approach 1:
The patent applies preliminary action by detecting BAR reconfiguration events before they complete and marking packets as 'old' in advance. The processor monitors for reconfiguration requests, marks packets received before the reconfiguration completes as 'old' packets, and ensures these are processed before any remapping occurs. This prevents packet corruption by proactively identifying packets that may be affected by upcoming BAR changes.
Solution Approach 2:
The patent maintains continuity of useful action by ensuring uninterrupted packet processing throughout the BAR reconfiguration process. 'Old' packets continue to be processed using the original BAR mappings, while 'new' packets are processed after remapping. This continuous processing approach prevents data loss and ensures that memory mapping efficiency is maintained throughout the transition, with no gaps or interruptions in packet handling.
3Ease of operation
If packets are processed in strict FIFO order during BAR reconfiguration, then packet processing simplicity is improved, but packet routing accuracy deteriorates
Solution Approach 1:
The patent applies segmentation by dividing packets into two distinct segments: 'old' packets and 'new' packets. This segmentation is based on the timing of packet reception relative to BAR reconfiguration events. 'Old' packets are those received before reconfiguration completes and use original BAR mappings, while 'new' packets are received after remapping and use new mappings. This clear division allows the system to handle different packet types with different routing rules, maintaining simplicity while improving accuracy.
Solution Approach 2:
The patent applies preliminary action by detecting BAR reconfiguration events before they complete and marking packets as 'old' in advance. The processor monitors for reconfiguration requests, marks packets received before the reconfiguration completes as 'old' packets, and ensures these are processed before any remapping occurs. This prevents packet corruption by proactively identifying packets that may be affected by upcoming BAR changes.
Data Source
AI summary
Embodiments herein provide for efficient memory mapping in a PCIe device when a host changes memory allocations in the device. One PCIe device comprises a plurality of Base Address Registers (BARs) defined by the host. The device also includes a processor with an address space. The processor maps addresses of the address space to the BARs for routing PCIe packets from the host. The processor can determine that the host is reconfiguring the BARs, and, based on the determination, mark packets existing in the computer memory as old, change the BARs in the computer memory as directed by the host, mark packets received after the BAR change as new, process the old packets from the computer memory based on their addresses of the address space until a new packet is reached, and to remap the BARs to the addresses of the address space after the new packet is reached.


