Automatic PCIe Bifurcation Configuration via Lane Detection

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Solution Overview

Problem

Current BIOS systems face challenges in accurately configuring PCIe bifurcation settings for various systems, leading to potential device detection issues and performance drops, and require frequent BIOS updates for new system designs, increasing maintenance complexity.

Innovation Solution

Implementing an automatic bifurcation detection and configuration system that divides PCIe IO unit lanes into smallest granularity ports, detects connected devices, and adjusts configurations dynamically, eliminating the need for pre-defined tables and reducing the necessity for BIOS updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a mapping table is provided in BIOS to correlate PCIe bifurcation configurations with different systems, then the BIOS can support multiple system types with a single firmware image, but the maintenance complexity increases and frequent updates are required for new system designs

Engineering Contradiction:
Improvesupport for multiple system typesVSAvoidmaintenance complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system automatically detects PCIe devices and configures bifurcation settings without requiring manual BIOS updates. The BIOS executes detection routines that identify connected devices and autonomously adjust lane configurations, eliminating the need for maintainers to update mapping tables for new system designs.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The PCIe bifurcation configuration transitions from a static mapping table approach to a dynamic detection and configuration system. The BIOS continuously detects device presence and automatically adjusts lane allocations based on current system state, allowing adaptability to new configurations without firmware updates.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the BIOS sets the correct PCIe bifurcation based on system type detection, then device compatibility is improved, but incorrect settings lead to device detection issues and performance degradation

Engineering Contradiction:
Improvedevice compatibilityVSAvoidbifurcation configuration accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The system implements a feedback mechanism where the BIOS detects PCIe devices, determines their required configurations, and adjusts bifurcation settings accordingly. The detection routine provides feedback about device presence and type, enabling the BIOS to automatically configure optimal lane allocations and verify correct operation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The BIOS performs preliminary detection of PCIe devices during system initialization and configures bifurcation settings before device operation begins. This preliminary configuration ensures devices are properly set up for optimal performance from startup, preventing detection issues and performance degradation.

Inventive Principle:
Principle #10Preliminary action

3Speed

If PCIe lanes are configured as wider ports for higher communication speed, then data transfer rate is improved, but the total number of supported PCIe devices is reduced

Engineering Contradiction:
Improvecommunication speedVSAvoidnumber of supported devices
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The PCIe lane configuration becomes dynamic, allowing the system to adjust lane widths based on detected device requirements. The BIOS can allocate wider lanes to devices needing high bandwidth while maintaining narrower lanes for devices with lower requirements, optimizing both speed and device count simultaneously.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Different PCIe ports can have different lane configurations optimized for their specific devices. The system applies local quality by allocating x16 lanes to one port for high-performance devices while dividing lanes into multiple x4 or x8 ports for other devices, ensuring each device receives appropriate bandwidth.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11132321B2Method and system for automatic bifurcation of PCIe in BIOS
Publication Date: 2021.09.28 QUANTA COMPUTER INC
  • US11132321B2 patent drawing
  • US11132321B2 patent drawing
  • US11132321B2 patent drawing

AI summary

A system and method for automatically generating a control bifurcation signal to configure ports of a PCIe IO unit on a computing device. The lanes of the PCIe IO unit are divided into initial ports of the lowest granularity. It is determined whether a PCIe device is connected to each of the initial ports. The bifurcation port configuration of the PCIe IO unit is determined based on the initial ports having a connected PCIe device. Ports for the PCIe IO unit are configured based on the bifurcation port configuration.