PCIe Link Stabilization During Storage System Boot
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Solution Overview
Problem
Storage systems face instability and errors due to hardware link failures during booting, particularly with PCIe links, which can lead to abnormal operation and reduced maintainability.
Innovation Solution
A storage system boot method that determines the connection status of PCIe devices during BIOS boot, sends reconnection instructions to stabilize the PCIe link by adjusting parameters, and initiates a system reboot if failures persist, ensuring a stable hardware connection and reducing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the storage system boots immediately after BIOS initialization, then the booting speed is improved, but hardware link failures may occur leading to system instability
Solution Approach 1:
The patent performs preliminary detection of PCIe device connection status during BIOS initialization before the storage system boots. This preliminary action identifies potential hardware link failures early, allowing the system to adjust parameters or retry connections before full operation begins, thus preventing instability while maintaining quick boot times.
Solution Approach 2:
The patent implements a feedback mechanism where the system continuously monitors PCIe link status during booting. When connection failures are detected, the system sends reconnection instructions and adjusts parameters based on the detected status, creating a closed-loop control that ensures reliable hardware connections before proceeding with storage system operation.
2Productivity
If the PCIe link speed is increased to improve data transmission, then the transmission efficiency is improved, but the error rate increases leading to link instability
Solution Approach 1:
The patent dynamically adjusts PCIe link parameters based on real-time connection status and error rates. The system can change transmission speeds, equalization settings, and other parameters on-the-fly to optimize both performance and stability, rather than using fixed high-speed settings that may cause instability.
Solution Approach 2:
The patent changes physical and operational parameters of the PCIe link such as transmission speed, equalization values, and preset parameters based on detected connection quality. When errors are detected, the system adjusts these parameters to reduce the error rate while maintaining acceptable data transmission efficiency.
3Reliability
If the system retries connection multiple times to ensure hardware device connection, then the connection reliability is improved, but the booting time increases
Solution Approach 1:
The patent implements a limited number of retry attempts with predefined conditions rather than indefinite retries. The system performs connection detection and retries a specific number of times with parameter adjustments, balancing connection reliability with acceptable boot time by avoiding excessive retry operations.
Data Source
AI summary
Provided are a storage system boot method and apparatus, and a computer-readable storage medium. The method includes: determining a configuration space by a bridge device; during booting a Basic Input Output System, after an initialization of a Peripheral Component Interconnect Express (PCIe) device is detected, determining, by connection information read from the configuration space, whether the preset hardware device is connected; if YES, continuing booting until finished; if NO, sending a reconnection instruction to stabilize a speed of a PCIe hardware link; when a number of the reconnection instruction sent is greater than a first preset value and the preset hardware device fails to be connected, sending a system reboot instruction; and when the number is less than the first preset value, continuing to determine whether the preset hardware device is connected after waiting for a preset duration.