PCIe Card-to-Card Communication for Distributed Heterogeneous Acceleration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current data transmission between heterogeneous acceleration cards in a distributed platform relies on network interfaces, leading to large data transmission delays and network packet loss, which are not suitable for all scenarios and reduce efficiency.

Innovation Solution

A communication method utilizing PCIE interfaces for direct data transmission between heterogeneous acceleration cards, involving the configuration of information tables and customized data packet formats to enable autonomous data communication without CPU intervention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If network interfaces are used for data transmission between heterogeneous acceleration cards, then communication between cards is enabled, but data transmission delay increases and packet loss occurs

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiddata transmission delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces a PCIE interface as an intermediary communication channel between heterogeneous acceleration cards, replacing the network interface. This intermediary provides a dedicated, high-speed transmission path that eliminates network protocol overhead and reduces packet loss, directly addressing the reliability and delay issues

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the communication function from the network interface layer and implements it directly at the hardware level through PCIE interfaces. By taking out the network protocol stack and using direct hardware-to-hardware communication, the system eliminates network-induced delays and packet loss

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If CPU is used as main transfer for data interaction between acceleration cards, then system compatibility is maintained, but data transmission efficiency decreases

Engineering Contradiction:
Improvesystem compatibilityVSAvoiddata transmission efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the communication path by establishing direct PCIE connections between acceleration cards, separating the data transmission function from CPU-mediated communication. This segmentation allows cards to communicate independently without CPU intervention, improving efficiency while maintaining system compatibility through standardized interfaces

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables acceleration cards to perform self-service communication through direct PCIE interfaces, eliminating the need for CPU as an intermediary. The cards autonomously handle data transmission tasks, improving productivity while the standardized PCIE interface maintains adaptability across different system configurations

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12487960B2Communication method and system for distributed heterogeneous acceleration platform, device and medium
Publication Date: 2025.12.02 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US12487960B2 patent drawing
  • US12487960B2 patent drawing
  • US12487960B2 patent drawing

AI summary

Provided are a communication method and system for a distributed heterogeneous acceleration platform, a device and a medium. The method includes: after starting a collaborative acceleration task, determining, by a first target heterogeneous acceleration card in a distributed heterogeneous acceleration platform, a second target heterogeneous acceleration card from the distributed heterogeneous acceleration platform by querying an information table corresponding to the collaborative acceleration task; generating, by the first target heterogeneous acceleration card, a target data packet according to a predefined data packet format, and sending the target data packet to the second target heterogeneous acceleration card via a PCIE interface; and parsing, by the second target heterogeneous acceleration card, the target data packet according to the data packet format, and executing a corresponding read operation or write operation according to a parsing result, so as to complete the collaborative acceleration task.